Phase noise minimized phase/frequency-locked...

Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation

Reexamination Certificate

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Details

C331S00100A, C331S1170FE, C331S057000, C331S185000

Reexamination Certificate

active

07907018

ABSTRACT:
A phase noise minimization circuit is disclosed, to be used in a voltage-controlled oscillator (VCO) circuit embedded in a feedback system. The phase noise minimization circuit includes a noise power meter to analyze the control voltage fed into the VCO by the feedback system and determine its voltage noise power. Since the VCO is controlled by the feedback system, the control voltage noise power is also an indication of the VCO phase noise power for frequencies offset within the bandwidth of the feedback system. The VCO has several parameters that can be adjusted to affect its phase noise. A minimization algorithm generates the optimum set of parameters that minimize the control voltage noise power (and thus the VCO phase noise power), and sends them to the oscillator. The phase noise minimization circuit may be used in a variety of applications, particularly in phase-locked loop and frequency-locked loop VCOs.

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Non-Final Office Action Received for U.S. Appl. No. 11/747,927 mailed on Oct. 29, 2008, 15 pages.
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