Structure for a duty cycle correction circuit

Details Structure for a duty cycle correction circuit Structure for a duty cycle correction circuit

2011-03-22

2011-03-22

Levin, Naum B (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

C716S105000, C327S175000

Reexamination Certificate

active

07913199

ABSTRACT:
A design structure for a Duty Cycle Correction (DCC) circuit is provide in which pairs of field effect transistors (FETs) in known DCC circuit topologies are replaced with linear resistors coupled to switches of the DCC circuit such that when the switch is open, the input signal is routed through the linear resistors. The linear resistors are more tolerant of process, voltage and temperature (PVT) fluctuations than FETs and thus, the resulting DCC circuit provides a relatively smaller change in DCC correction range with PVT fluctuations than the known DCC circuit topology that employs FETs. The linear resistors may be provided in parallel with the switches and in series with a pair of FETs having relatively large resistance values. The linear resistors provide resistance that pulls-up or pulls-down the pulse width of the input signal so as to provide correction to the duty cycle of the input signal.

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