Semiconductor and method for producing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

Reexamination Certificate

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C257SE29184, C438S305000

Reexamination Certificate

active

07989843

ABSTRACT:
A method produces a semiconductor by conducting superimposed doping of a plurality of dopants in a semiconductor substrate, which includes evaporating a (2×n) structure by a first dopant and forming its thin line structure on the substrate, then bringing the semiconductor substrate to a temperature capable of epitaxial growth, vapor depositing a second or third or subsequent dopants above the semiconductor substrate where the first dopant has been deposited, then epitaxially growing a semiconductor crystal layer over the semiconductor substrate, subsequently forming a superimposed doping layer composed of the first, second, or the third or subsequent dopants in the semiconductor substrate, and applying an annealing treatment to the superimposed doping layer at a high temperature, thereby activating the plurality of dopants electrically or optically. Superimposed doping of a plurality kinds of elements as dopants is performed to a predetermined depth in the case of an elemental semiconductor.

REFERENCES:
patent: 5183777 (1993-02-01), Doki et al.
patent: 2004/0217375 (2004-11-01), Yokogawa et al.
patent: 0 183 164 (1986-06-01), None
patent: 61-166081 (1986-07-01), None
patent: 2-132823 (1990-05-01), None
patent: 6-283432 (1994-10-01), None
patent: 9-171963 (1997-06-01), None
patent: 2000-3877 (2000-01-01), None
patent: 2001-53270 (2001-02-01), None
patent: 2002-25921 (2002-01-01), None
patent: 2002025921 (2002-01-01), None
Translation of JP2002025921A downloaded from JPO on Dec. 16, 2010.
J. H. G. Owen et al., “Self-Assembled Nanowires on Semiconductor Surfaces”, J. Mater Sci. 41, (2006), pp. 4568-4603.
J. H. G. Owen et al., “One-Dimensional Epitaxial Growth of Indium on a Self-Assembled Atomic-Scale Bismuth Template”, Nanotechnology 17, Institute of Physics Publishing, Dec. 14, 2005, pp. 430-433.
Shuhei Yagi et al., “Surface Bismuth Removal After Bi Nanoline Encapsulation in Silicon”, Surface Science 595, (2005), pp. L311-L317.
J. H. G. Owen et al., “Stress Relief as the Driving Force for Self-Assembled Bi Nanolines”, Physical Review Letters, vol. 88, No. 22, Jun. 3, 2002, pp. 226104-1-226104-4.
K. Miki et al., “Bismuth and Antimony Nanolines in a Si Epitaxial Layer”, Inst. Phys. Conf. Ser. No. 164, Mar. 22-25, 1999, pp. 167-170.
K. Miki et al., “Atomically Perfect Bismuth Lines on Si(001)”, Physical Review B, vol. 59, No. 23, Jun. 15, 1999, pp. 14868-14871.
K. Miki et al., “Bismuth-Induced Structures on Si(001) Surfaces”, Surface Science 421, (1999), pp. 397-418.
International Search Report mailed Nov. 6, 2007 for International Application No. PCT/JP2007/066584.

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