Semiconductor memory device and method for reducing current...

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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C365S233130, C327S158000

Reexamination Certificate

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07936636

ABSTRACT:
Semiconductor memory device and method for operating the same includes a data output unit configured to output data in synchronization with a data output clock and a clock control unit configured to selectively transfer the data output clock to the data output unit under the control of a read command.

REFERENCES:
patent: 6381194 (2002-04-01), Li
patent: 6987699 (2006-01-01), Lee
patent: 7173866 (2007-02-01), Na et al.
patent: 7365583 (2008-04-01), Shin
patent: 7446579 (2008-11-01), Kim et al.
patent: 1020040095969 (2004-11-01), None
patent: 1020050041607 (2005-05-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Oct. 23, 2009.

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