Switched capacitor circuit and pipeline A/D converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S161000

Reexamination Certificate

active

07924206

ABSTRACT:
There is provided a switched capacitor circuit and a pipeline A/D converter which are capable of suppressing electric power from being increased by utilizing a level-shift capacitor, even in a case where the switched capacitor circuit and the pipeline A/D converter are configured by utilizing a CLS technique. In the estimate phase, the capacitor Cc1(level shift capacitor) is connected between the output terminal of the operational amplifier AMP2and the inverting input terminal of the operational amplifier AMP2, so as to sample the output from the operational amplifier AMP2, and also to compensate the phase of the operational amplifier AMP2. Additionally, in the level shift phase, the capacitor Cc1is connected between the output terminal of the operational amplifier4and the output terminal Vb, so as to be used to level-shift the output of the operational amplifier AMP2. Thereby, the load (the capacitance of the capacitors Cc1and Cc2) on the operational amplifier AMP2is reduced, thereby reducing the electric power of the switched capacitor circuit200.

REFERENCES:
patent: 6304208 (2001-10-01), Nagashima
patent: 6727749 (2004-04-01), Quinn
patent: 6784824 (2004-08-01), Quinn
patent: 2000-209093 (2000-07-01), None
patent: 2005-537749 (2005-12-01), None
patent: 2009-027282 (2009-02-01), None
B.R. Gregoire, et al., “An Over-60dB True Rail-to Rail Performance Using Correlated Level Shifting and an Opamp with 30dB Loop Gain” IEEE ISSCC 2008 Conference Feb. 6, 2008, p. 540.

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