Method and apparatus for tiling a block of image data

Computer graphics processing and selective visual display system – Computer graphic processing system – Integrated circuit

Patent

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Details

345517, 711202, G06F 1206

Patent

active

060644079

ABSTRACT:
A method and apparatus for tiling a block of image data is accomplished by first receiving a set of parameters that describe the block of image data. An address is determined based on the set of parameters, and the address is translated to a corresponding tiled address. In translation, the address is first separated into horizontal and vertical coordinates. The horizontal coordinates are applied to a horizontal lookup table to obtain a horizontal component of a destination offset, and the vertical coordinates are applied to a vertical lookup table to obtain a vertical component. The horizontal and vertical components are then combined to produce the destination offset. The destination offset is added to a destination base pointer to produce the corresponding tiled address. Data is copied from the address to the corresponding tiled address. The address is then incremented, and the process is repeated for each address in the block of image data.

REFERENCES:
patent: 5990912 (1999-11-01), Swanson

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