Sensing of memory cells in a solid state memory device by...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S185210, C365S185170, C365S233100, C365S233120

Reexamination Certificate

active

07894271

ABSTRACT:
In one or more of the disclosed embodiments, a memory device is provided that reads a target memory cell by first charging the series string of memory cells to which the target memory cell is coupled. A fixed unit of charge is removed from the charged bit line. The bit line is sensed by sense amplifiers to determine the read voltage (i.e., threshold voltage) applied to a word line coupled to the target cell in order to turn on the target cell. The threshold voltage is indicative of the analog voltage stored on the target memory cell.

REFERENCES:
patent: 2008/0158980 (2008-07-01), Kamei et al.
patent: 2008/0165585 (2008-07-01), Surico et al.
patent: 2008/0247254 (2008-10-01), Nguyen et al.
patent: 2009/0003069 (2009-01-01), Lee et al.
patent: 2009/0168513 (2009-07-01), Tanaka

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Sensing of memory cells in a solid state memory device by... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Sensing of memory cells in a solid state memory device by..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Sensing of memory cells in a solid state memory device by... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2627835

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.