Vector processing apparatus including vector registers having se

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364736, G06F 15347

Patent

active

047605456

ABSTRACT:
A vector instruction which designates calculation of vector data or vector data transfer between vector registers and the main memory, is arranged in such a way as to specify an element in the vector register from which the read/write operation is to be commenced, in order to make it possible to start the reading or writing of the vector data stored in the vector register from any desired element, thereby allowing a partial reference to the array data to be made on the vector register. Further, a vector instruction, which designates the vector data transfer between each vector register and the main memory, is arranged in such a way as to be able to specify the number of vector data elements to be transferred, thereby allowing transfer of elements requisite and adequate for a plurality of partial references on the vector register.

REFERENCES:
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patent: 4302818 (1981-11-01), Niemann
patent: 4435765 (1984-03-01), Uchida et al.
patent: 4507728 (1985-03-01), Sakamoto et al.
patent: 4541046 (1985-09-01), Nagashima et al.
patent: 4594682 (1986-06-01), Drimak

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