Current generating circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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C327S543000

Reexamination Certificate

active

06297688

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to a current generating circuit applicable to an integrated circuit such as a semiconductor memory and also to an oscillator comprising such a current generating circuit.
FIG. 23
of the accompanying drawings schematically illustrates an oscillator of the type under consideration.
When the oscillator is operated, signal OSC is held to the supply potential Vcc and signal VGP is held to the ground potential (0V), while signal VGN is also held to supply potential Vcc.
Referring to
FIG. 23
, the delay time of an inverter circuit normally becomes reduced as the supply potential Vcc increases. Besides, the current level required for charging and discharging capacitors C
1
and C
2
increases at a rate greater than the first power of the supply potential Vcc as the latter also increases.
Thus, the oscillation period Tosc of the oscillator is shortened as the supply potential Vcc rises.
Therefore, when the oscillator is used as a timer, the oscillation period Tosc of the oscillator is reduced as the supply potential Vcc rises so that consequently the operating time of the timer is curtailed to reduce the margin of the operating timne of the timer for the operation of the chip because the oscillator period Tosc relies on the supply potential Vcc. To date, chips of the type under consideration are accompanied by the problem that the supply potential Vcc of the chip is confined to a narrowly limited range.
Now, let's look into a case where an output signal of the oscillator of
FIG. 23
is used as drive signals RING, /RING for a booster as illustrated in FIG.
27
.
Signal /OSC is held to the groun d potential (0V) when the booster is operated, whereas it is held to the supply potential Vcc when the booster is not operated. Note that, in
FIG. 27
, Qd
1
denotes a depression type N-channel MOS transistor and Qn denotes an enhancement type N-channel MOS transistor.
The booster produces a potential higher than the supply potential Vcc on the basis of the supply potential Vcc and the drive signals RING, /RING, which potential is then output as output signal Vout. Generally speaking, the output current Iout of the booster is linearly proportional to Vcc—Vthn (where Vthn is a threshold value of the MOS transistor Qn) and inversely proportional to the oscillation period Tosc of the drive signals RING, /RING.
The output current Iout and the consumed current Icc of the booster can be expressed by specific formulas shown, employing the number of units n of the booster (which corresponds to the number of capacitors or that of inverters in FIG.
27
);
Iout=k26×(Vcc−Vthn)/Tosc  (15-1)
and
Icc=k27×(n+1)×(Vcc−Vthn) Tosc  (15-2),
where k26 and k27 are constants independent of the supply potential Vcc).
For the chip to operate in a stable manner, it is desirable that both the output current Iout and the consumed current Icc depend little on the supply potential Vcc.
However, when the output signal of the oscillator of
FIG. 23
whose oscillation period relies on the supply potential Vcc is used as a drive signal of the booster of
FIG. 27
, the output current Iout and the consumed current Icc of the booster of
FIG. 27
increases at a rate greater than the first power of the supply potential Vcc if the latter also increases. Thus, it is not possible to realize an output current Iout and a consumed current Icc that are stable relative to fluctuations in the supply potential Vcc.
As discussed above, there are known only oscillators whose oscillation period becomes curtailed as the supply potential Vcc rises. Thus, the output current Iout and the consumed current Icc of a booster using an output signal of such an oscillator inevitably rely heavily on the supply potential Vcc so that consequently it is not possible for the booster to operate in a stable fashion relative to fluctuations in the supply potential Vcc.
BRIEF SUMMARY OF THE INVENTION
Therefore, it is the object of the present invention to provide a current generating circuit whose dependency on the supply potential can be varied and also provide an integrated circuit that comprises such a current generating circuit and is little dependent on the supply potential so that it may operate in a stable fashion regardless of fluctuations in the supply potential.
According to a first aspect of the invention, there is provided a current generating circuit comprising:
a first transistor connected between a first supply terminal and a node directly or by way of another element;
a total of k first elements (0≦k≦n (where n is 0 or a natural number)) connected between the first supply terminal and the node directly or by way of another element;
a total of n−k second elements connected between the node and a second supply terminal directly or by way of another element;
a control circuit for setting the potential of the node to a predetermined level; and
a second transistor having its source connected to the first supply terminal directly or by way of another element and its gate connected to the gate of the first transistor and adapted to generate a second current by using a first current flowing to the first transistor as reference;
the first current flowing to the first transistor showing a current value equal to the value obtained by subtracting the sum of the currents flowing to the respective k first elements from the sum of the currents flowing to the respective n−k second elements.
Preferably, a current flows to all of the first transistor, the k first elements and the n−k second elements when the current generating circuit is operated.
Preferably, both the k first elements and the n−k second elements comprise resistors or transistors.
According to the invention, there is also provided a current generating circuit comprising:
a first transistor connected between a first supply terminal and a node directly or by way of another element;
a first element connected between the first supply terminal and the node directly or by way of another element;
a second element connected between the node and a second supply terminal directly or by way of another element;
a control circuit for setting the potential of the node to a predetermined level; and
a second transistor having its source connected to the first supply terminal directly or by way of another element and its gate connected to the gate of the first transistor and adapted to generate a second current by using a first current flowing to the first transistor as reference;
the first current flowing to the first transistor showing a current value equal to the value obtained by subtracting the current flowing to the first element from the current flowing to the second element.
According to the invention, there is also provided a current generating circuit comprising:
a first transistor connected between a first supply terminal and a node directly or by way of another element;
a plurality of first elements connected between the node and a second supply terminal directly or by way of another element;
a control circuit for setting the potential of the node to a predetermined level; and
a second transistor having its source connected to the first supply terminal directly or by way of another element and its gate connected to the gate of the first transistor and adapted to generate a second current by using a first current flowing to the first transistor as reference;
the first current flowing to the first transistor showing a current value equal to the sum of the currents flowing respectively to the plurality of first elements.
According to a second aspect of the invention, there is provided a current generating circuit comprising:
a first transistor connected between a first supply terminal and a node directly or by way of another element;
a first element connected between the first supply terminal and the node directly or by way of another element;
a second element connected between the node and a second supply terminal directly or by way of another element;

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