Process for the definition of openings in a dielectric layer

Semiconductor device manufacturing: process – Chemical etching – Altering etchability of substrate region by compositional or...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S704000, C438S734000, C430S005000, C216S057000, C216S062000

Reexamination Certificate

active

06313040

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to the manufacturing of integrated circuits. More particularly, the invention relates to a process for defining openings in a dielectric layer, for example a process for defining contact openings to allow electrical interconnections to contact active elements.
Any integrated circuit, be it a memory device such as an EPROM or a Flash EEPROM, or a power device, generically comprises at least an active element, e.g. exploiting the features of the metal-oxide-semiconductor system properties, and electrical interconnections, normally formed by an aluminum alloy, for allowing the operation of the active element. The active element and the electrical interconnections communicate by means of contacts.
The contacts allow for accessing e.g. a memory cell in a memory device, or a transistor of a logic circuit. The number of contacts in an integrated circuit may range from some hundred thousands to some tens millions. Therefore, the degree of defectivity, i.e. the number of malfunctioning contacts, is probably the main parameter for estimating the yield of a manufacturing process.
The contacts must have an ohmic behavior, that means when the voltage applied is varied, the measured current must follow Ohm's law.
The reduction in size of the devices involves the capability of making contacts so small as 0.25 &mgr;m in the last generation of devices. This can only be achieved by a fine control of each step of the manufacturing of contacts, i.e. lithography, etching and removal of material.
The lithographic process allows for defining the contact by exposure of a chrome mask over a photoresist layer. The light passing through the mask is focused onto the photoresist layer by a system of lenses. The exposed areas of the photoresist layer are then dissolved by a basic developing solution. A good lithographic process must guarantee the size stability of the structure opened in the photoresist layer in respect of varying focal length and light intensity.
The most advanced exposure techniques (Deep Ultra Violet or DUV) makes use of light sources formed by excimer lasers emitting light in the ultraviolet region of the spectrum (248 nm). Almost all of the photoresist materials which are sensitive to light of such wavelengths are easily contaminated, due to the presence in the environment of substances such as ammonia and amines, or by coming into contact with some particular kind of substrates. Such contamination has, as a consequence, a bad definition of the openings to be formed in the photoresist layer, and the presence of undesired residual parts (t-topping and footing).
The contacts are often defined in a dielectric layer, typically BPSG—Boron-Phosphorus Silicon Glas). BPSG is a strong contaminant agent for the photoresist materials. The common solution to this problem provides for interposing between the photoresist layer and the BPSG layer thin, undoped dielectric layers such as TEOS, or anti-reflecting material layers, either organic or inorganic.
However, this solution can introduce defects in the contacts, and pose problems in the integration.
During the etching step, the contacts previously defined photolithographically in the photoresist layer are opened in the underlying dielectric layer, e.g. the BPSG, so to allow the metal interconnection which will be formed over the dielectric layer to come into contact with the underlying semiconductor. The etching step is performed by means of a plasma containing active species that act through a combined chemical-physical action. This action must be selective with respect to the photoresist layer. When the dimensions of the contacts are so small as to require photoresist materials suitable for DUV exposure, the conventional chemical compositions used for the etching step have shown to be poorly selective, with a consequent lost of contact size control.
The process of removal of the photoresist layer provides for an O
2
/N
2
plasma etching that eliminates almost all of the photoresist, followed by a wet treatment with H
2
O
2
/NH
4
OH for removing possible residual parts. However, this last treatment involves an isotropical etch of the contact walls, widening the contact size of approximately 25%.
A technique has been proposed for overcoming these problems, specifically for avoiding the loss of size control and for increasing the lithographic resolution of the contact. This technique provides for depositing, over the dielectric layer (e.g., the BPSG) a layer of polysilicon. The polysilicon layer is then used as an inorganic mask. The polysilicon layer prevents contamination of the photoresist layer by the dielectric. The polysilicon layer also increases the dimensional stability even varying the focal length of the lens system for the projection of the mask. The reflectivity of the polysilicon layer allows for using lower light intensity, thus reducing the heating of the lenses. Additionally, the reflectivity of the polysilicon layer allows for less residual parts at the bottom of the contact. The main feature of the use of a polysilicon layer is the high selectivity of the polysilicon etching step compared to that of the photoresist. This allows for using thin photoresist layers, thus significantly increasing the focal depth and the capability of opening contacts of smaller dimension.
According to the above technique, a polysilicon layer is firstly deposited over the dielectric layer wherein the contacts have to be opened. A photoresist layer is then deposited over the polysilicon layer. The photoresist layer is then exposed to a light source by means of a mask, and it is developed. A basic solution allows for selectively removing the photoresist layer. Then, a plasma etching process is performed, and the polysilicon layer is etched where the photoresist layer has been removed. Contact openings are thus defined in the polysilicon layer. During the plasma etching high-energy ions hit the polysilicon layer along a direction orthogonal to the surface thereof. The neutral radicals in the plasma isotropically reach the surface of the device along all the directions, and determine chemical reactions. The byproducts of the reactions are mostly volatile gases that are desorbed by the surface, and removed from the etching area. The presence of non-volatile reaction products, that cannot be easily removed, causes a polymerization that often translates into an increased defectivity. The high selectivity with respect to the photoresist reduces the formation of a layer of non-volatile reaction products, thus minimizing the polymerization and assuring the formation of a thin lateral wall protecting the profiles of the isotropical etch. The high selectivity with respect to the photoresist and the underlying dielectric layer also allow for preserving the photolithographic dimensions and the substrate integrity during the whole etching process. Then, the photoresist layer is completely removed, without modifying the etch profile. The polysilicon layer is now ready for acting as an inorganic mask for the etching of the underlying dielectric layer.
Contacts are opened in the dielectric layer by means of a plasma etch. This etch must assure the least loss of size control, a high selectivity with respect to the dielectric layer and a vertical profile of the contact to be formed. The polysilicon mask is extremely advantageous compared to the conventional photoresist masks used for DUV photolithography. In fact, selectivity of the dielectric layer etch with respect to polysilicon is at least four times higher than that obtained with the DUV photoresist. This allows for almost perfectly maintaining the dimensions of the contact (the dimensional loss is almost zero), and also has the great advantage of allowing the deposition of an extremely thin polysilicon layer, thus making it easier to control the polysilicon etching for the formation of the polysilicon mask.
During the etching of the dielectric layer by means of the conventional photoresist mask the interaction of the chemical sp

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process for the definition of openings in a dielectric layer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for the definition of openings in a dielectric layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for the definition of openings in a dielectric layer will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2615043

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.