Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-08-18
2001-02-20
Chang, Kent (Department: 2778)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S094000, C345S096000
Reexamination Certificate
active
06191769
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display device having a driving method in which the polarities of signal potentials are inverted when they are written to the pixel electrodes.
2. Description of the Related Art
A driving method of a liquid crystal display device that is commonly employed conventionally will be described with reference to
FIGS. 10-12
.
FIG. 10
shows a liquid crystal display device system and polarities of display signals that are written to a display panel
1
of the system. Reference numerals
2
and
3
denote a signal line driver and a scanning line driver, respectively. Reference numeral
4
denotes a display timing controller for controlling the signal line driver
2
and the scanning line driver
3
.
FIG. 11
shows, in the forms of two-dimensional pictures, (n−1)th-field and nth-field display signals in FIG.
10
. In the picture of the (n−1)th field, plus signals and minus signals are written alternately from the first line to the nth line. In the next, nth field, the polarity of the lth-line signal is changed from plus to minus.
FIGS. 12A and 12B
show an output signal of the signal line driver
2
and output signals of the scanning line drivers
3
in the nth field, respectively. In
FIG. 12A
, signals shown above the chain line are display signals of positive polarity and those shown below the chain line are display signals of negative polarity. As shown in
FIG. 12A
, negative-polarity (minus) signals are output continuously for the lth line for which the polarity is changed from the (n−1)th field and for the lines before and after it, that is, the (1−1)th and (1+1)th lines. Therefore, for the lth line and the (1+1)th line, the display signals have no rising portion from the lowest potential; that is, they have no voltage transient period. Therefore, the amplitude of the final potential in those scanning lines is larger than that in other scanning lines by &Dgr;Vsig [V]. As a result, in the lth line and the (l +1)th line, display signals having a larger amplitude by &Dgr;Vsig [V] are written and hence brighter display is effected than in other scanning lines. The increase of &Dgr;Vsig [V] in signal amplitude results from the driving ability of the signal line driver
2
, particularly its output impedance.
FIG. 12A
also shows, by a broken line, an output signal of an ideal signal line driver whose output impedance is zero. In this case where the output impedance is zero, the polarity inversion of the signal is completed instantaneously and the final value of the signal amplitude is kept constant irrespective of whether portions of the same polarity exist; there occurs no problem in display. However, actually, since the driver
2
has a certain, non-zero output impedance value, a low-pass filter is formed by a parasitic capacitance in the liquid crystal panel
1
and the output impedance of the driver
2
, which causes a problem that waveform distortion occurs as indicated by the continuous line and a flicker occurs on the display screen.
SUMMARY OF THE INVENTION
As described above, in conventional liquid crystal display devices, signal writing is performed continuously to pixels for which polarity inversion is effected with respect to the preceding field and to pixels for the next signal writing. Since pixels for which polarity inversion is effected with respect to the preceding field and pixels for the next signal writing are continuously given signals of the same polarity, waveform distortion of signal voltages due to the output impedance of the signal line driver causes a problem that the luminance increases or decreases improperly or a flicker occurs on the display screen.
The present invention has been made in view of the above problem, and an object of the invention therefore to provide a liquid crystal display device capable of displaying high-quality images that are free of such undesirable phenomena as improper increase or decrease in luminance and a flicker on the display screen by preventing waveform distortion of display signals that is caused by a high output impedance of the signal line driver from causing adverse effects by controlling the writing of display signals to the pixel electrodes so as to avoid amplitude variation periods of the display signals.
To attain the above object, the invention provides a liquid crystal display device comprising a plurality of signal lines and a plurality of scanning lines that are arranged in lattice form; pixel electrodes that are arranged in matrix form at crossing portions of the signal lines and the scanning lines, a display voltage being written to each of the pixel electrodes from one of the signal lines electrically connected thereto in a display voltage writing state that is established when a corresponding one of the scanning lines is selected; an counter electrode that is opposed to the pixel electrodes; a liquid crystal layer provided between the pixel electrodes and the counter electrode; a signal line driver for sequentially transferring display voltages having alternate polarities to the signal lines; a scanning line driver for selectively driving the scanning lines to thereby allow display voltages to be written to part of the pixel electrodes corresponding to a selected scanning line; and control means for causing, when a polarity of display voltages to be supplied to a particular one of the signal lines in one field or frame is opposite to a polarity of display signals that were supplied to the same signal line in a preceding field or frame, the signal line driver to supply display voltages to pixel electrodes corresponding to a next signal line after inserting a dummy cycle having a predetermined interval.
From another point of view, the control means is means for causing the display signal driver to insert a dummy cycle to thereby supply stabilized output voltages having continuity polarity inversion cycle when the display signal driver supplies display voltages having the same polarity as in a preceding field to pixel electrodes corresponding to a first scanning line and supplies display voltages having an inverse to those supplied in the preceding field to pixel electrodes corresponding to a second scanning line that is next to the first scanning line. This liquid crystal display device corresponds to the first and third embodiments.
It is desirable that the predetermined interval be shorter than a time constant of an output impedance of the signal line driver and a parasitic capacitance of one of the signal lines. This is because if the interval is longer than the above time constant, the absolute value of the signal line driver output in the dummy cycle becomes different from that during actual writing, to cause a flicker in a displayed image.
Specifically, to avoid making the control of the entire display system unduly complex, it is desirable that the interval of the dummy cycle be substantially equal to a period necessary for scanning one of the scanning lines.
Wherein the liquid crystal layer is a ferroelectric liquid crystal layer or an antiferroelectric liquid crystal layer, it is desirable that the display voltage writing time for the particular scanning line be longer than that for the next scanning line, or the absolute value of the display voltages for the particular scanning line be larger than that for the next scanning line. This is because where a ferroelectric liquid crystal layer or an antiferroelectric liquid crystal layer is used, large depolarization current requires a sufficiently long writing time or a sufficiently large write voltage.
As for specific hardware of the control means, it is desirable that the control means comprise a scanning signal delay circuit for supplying a scanning signal to the scanning line driver; a display signal delay circuit for supplying a display signal to the signal line driver; and a display timing controller for supplying a scanning signal and a delay signal selection control signal to
Fujiwara Hisao
Okumura Haruhiko
Chang Kent
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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