Dynamic information storage or retrieval – Binary pulse train information signal – Binary signal gain processing
Reexamination Certificate
1998-12-02
2001-02-06
Huber, Paul W. (Department: 2753)
Dynamic information storage or retrieval
Binary pulse train information signal
Binary signal gain processing
C360S053000
Reexamination Certificate
active
06185175
ABSTRACT:
FIELD OF INVENTION
The present invention relates to the recording and reproduction of binary data in disk storage systems for digital computers, particularly to a sampled amplitude read channel employing noise whitening in a post processor of a remod/demod sequence detector.
BACKGROUND OF THE INVENTION
In disk drive storage devices for digital computers, such as magnetic and optical disk drives, sampled amplitude read channels employing partial response (PR) signaling with maximum likelihood (ML) sequence detection have provided a substantial increase in storage capacity by enabling significantly higher linear bit densities. Partial response signaling refers to a particular method for transmitting symbols represented as analog pulses through a communication medium. The benefit is that at the signaling instances (baud rate) there is no intersymbol interference (ISI) from other pulses except for a controlled amount from immediately adjacent, overlapping pulses. Allowing the pulses to overlap in a controlled manner leads to an increase in the symbol rate (linear recording density) without sacrificing performance in terms of signal-to-noise ratio (SNR).
Partial response channels are characterized by the polynomials
(1−D)(1+D)
n
where D represents a delay of one symbol period and n is an integer. For n=1,2,3, the partial response channels are referred to as PR
4
, EPR
4
and EEPR
4
, with their respective frequency responses shown in FIG.
1
A. The channel's dipulse response, the response to an isolated symbol, characterizes the transfer function of the system (the output for a given input). With a binary “1” bit modulating a positive dipulse response and a binary “0” bit modulating a negative dipulse response, the output of the channel is a linear combination of time shifted dipulse responses. The dipulse response for a PR
4
channel (1−D
2
) is shown as a solid line in FIG.
1
B. Notice that at the symbol instances (baud rate), the dipulse response is zero except at times t=0 and t=2. Thus, the linear combination of time shifted PR
4
dipulse responses will result in zero ISI at the symbol instances except where immediately adjacent pulses overlap.
It should be apparent that the linear combination of time shifted PR
4
dipulse responses will result in a channel output of +2, 0, or −2 at the symbol instances depending on the binary input sequence. The output of the channel can therefore be characterized as a state machine driven by the binary input sequence, and conversely, the input sequence can be estimated or demodulated by running the signal samples at the output of the channel through an “inverse” state machine. Because noise will obfuscate the signal samples, the inverse state machine is actually implemented as a trellis sequence detector which computes a most likely input sequence associated with the signal samples (i.e., the sequence through a trellis that is closest to the signal samples in Euclidean space).
The performance of the trellis sequence detector in terms of bit error rate depends on the amount and character of noise in the system, including noise due to the spectrum of the read signal diverging from the ideal partial response. A channel equalizer is typically employed to shape the response of the read channel into the target partial response and to remove linear distortions in the read signal. The channel equalizer may be implemented in continous-time operating on the analog read signal, or it may be implemented in discrete-time operating on samples of the read signal, or both. Typical read channels employ an analog equalizer, such as a biquad analog filter, followed by a nth order finite-impulse response (FIR) discrete-time filter.
A drawback of the channel equalizers is that they tend to correlate the noise in the read signal, thereby degrading the performance of the trellis sequence detector which is a maximum likelihood detector only if the noise is additive white Gausian (AWG). Further, the undesirable noise correlating effect of the channel equalizers increases as the amount of equalization required to match the channel response to the target response increases. Increasing the order of the partial response target generally decreases the amount of equalization required, but it also increases the cost and complexity of the trellis sequence detector due to the increase in the number of states in the trellis state machine. The amount of equalization required also increases as the linear bit density increases, which is inevitable given the perpetual increase in demand for higher capacity disk drives.
There is, therefore, a need for a sampled amplitude read channel for use in disk storage systems that provides a performance enhancing improvement by attenuating the deleterious effect of the channel equalizer filters without increasing the cost and complexity of the trellis sequence detector. In particular, it is an object of the present invention to compensate for the performance degradation caused by the channel equalizers correlating the noise in the read signal.
SUMMARY OF THE INVENTION
A sampled amplitude read channel is disclosed for disk storage systems (e.g., magnetic or optical) comprising a sampling device for sampling the analog read signal emanating from the read head positioned over a disk storage medium, a channel equalizer for equalizing the signal samples according to a desired partial response, a trellis sequence detector for detecting a preliminary sequence from the equalized signal samples, and a post processor for correcting errors in the preliminary sequence, including errors caused by the channel equalizers correlating the noise in the read signal. The preliminary sequence detected by the sequence detector is remodulated into ideal partial response samples and then subtracted from the actual signal samples to generate a sequence of sample errors. The sample errors are then filtered by a sample error filter, and the filtered sample errors are correlated with error event sequences corresponding to the most likely error events of the trellis sequence detector. The sample error filter compensates for the noise correlating effect of the channel equalizers by effectively whitening the noise to provide a closer approximation to an optimum maximum likelihood detector. When an error event is detected, the preliminary sequence is corrected with a correction sequence corresponding to the detected error event.
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H. L.
Cirrus Logic Inc.
Huber Paul W.
Sheerin Howard H.
Shifrin Dan A.
Violette J. P.
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