Analog circuitry for start-up glitch suppression

Details Analog circuitry for start-up glitch suppression Analog circuitry for start-up glitch suppression

2000-02-22

2001-11-13

Pascal, Robert (Department: 2817)

Amplifiers

Combined with automatic amplifier disabling switch means

C330S149000, C381S094400

Reexamination Certificate

active

06316993

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to electronic circuits and, more particularly, to analog circuitry for suppressing speaker noise when an operational amplifier driving the speaker is powered on or off.
BACKGROUND OF THE INVENTION
Standard audio output drivers are capacitively coupled, or at least have bypass capacitors, to ground. Thus, if an operational amplifier (op amp) which drives the audio output is powered down during a “sleep” mode, for example, to save system power, the capacitor at the output will experience a small charge as the op amp is powered down, or a small discharge when the op amp is powered up. This charging and discharging will cause the voltage to change, and will be heard through the speaker load. The sound is like a “pop” or a “click”, and is considered to be highly undesirable in audio systems.
A prior art method to suppress this noise is shown in FIG.
1
. In this approach, PWDN (PoWer DowN) is a digital signal that turns the bias current to the op amp off so that the entire circuit goes to a high impedance state. PWDN(bar) is the inverted state of this digital signal and is used to turn an FET switch on so that a blocking capacitor, C
B
, charges to the dc value of the system ground. This also is the dc voltage when there is no signal applied to the input node of the op amp.
A problem with this approach is that the op amp has an input-referred offset voltage which may be around 1-3 mV. This voltage is the difference between the system ground and the output of the op amp (in unity gain, R
i
=R
f
) when the op amp is on. So when the op amp is turned on the offset voltage will charge the capacitor and cause a “glitch.” A standard measure of this voltage transient is called “glitch impulse” or “glitch energy.” It is equal to the integral of the output voltage over time (∫
o
∞
V
o
dt), with units of volt-seconds (V-s). For the prior art circuit shown, the glitch energy is on the order of 10
−4
V-s. While this approach reduces the amount of speaker noise during transitions between the powered up and sleep modes, it does not reduce the “pops” and “clicks” to below an audible level.
SUMMARY OF THE INVENTION
In view of the above statement of the prior art in this technology, it is a primary objective of the present invention to provide analog circuitry which provides improved glitch energy suppression in a driver circuit during power down and power up of an op amp driving a speaker load.
In accordance with the principles of the present invention, there is disclosed bias current supply means for use in an operational amplifier (op amp) having a first input terminal adapted to be coupled to an input signal, a second input terminal adapted to be coupled to a reference potential and an output terminal adapted to be capacitively coupled to a load device. The bias current supply means includes means for coupling a first bias current to the op amp, means for coupling a second bias current to the op amp, the first bias current being much greater than the second bias current, and switch means responsive to a mode control signal for enabling either the first bias current or the second bias current to the op amp.


REFERENCES:
patent: 4502019 (1985-02-01), Van Roermund
patent: 4613823 (1986-09-01), Rinderle et al.
patent: 4670720 (1987-06-01), Dijkmans
patent: 4956616 (1990-09-01), Botti
patent: 5014017 (1991-05-01), Ishiguro et al.
patent: 5399992 (1995-03-01), Itakura et al.
Eric A. Vittoz, “Micropower Techniques,”Design of Analog-Digigtal VLSI Circuits for Telecommunications and Signal Processing, Second Edition, pp. 53, 66-67.

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