Amplifiers – With semiconductor amplifying device – Including signal feedback means
Reexamination Certificate
2000-07-06
2001-10-23
Shingleton, Michael B. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including signal feedback means
C330S257000, C330S255000
Reexamination Certificate
active
06307438
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to electronics, and, more particularly, to a multistage operational amplifier capable of operating at a low power supply voltage.
For an operational amplifier, a low power supply voltage means a voltage on the order of 1.8 V. This voltage is equivalent to the voltage of two electrical batteries in series with a nominal voltage of 1.5 volts in a discharged state. The voltage across each of these electrical batteries when in the discharged state is about 0.9 volts.
An amplifier capable of operating at a voltage greater than or equal to 1.8 volts is thus capable of making the best use of the available energy in equipment powered by batteries. However, the use of the amplifier is not limited to battery powered equipment. The amplifier may be used in many types of electronic circuits, and particularly in circuits requiring a high current gain. Thus, the amplifier may be used in interface circuits and power stages, and also in summation circuits, and filters, etc. In particular, the amplifier may be used in battery powered portable electrical equipment, earphones and mobile telephones.
BACKGROUND OF THE INVENTION
A basic diagram for a known type of multistage operational amplifier is illustrated in FIG.
1
. The amplifier includes an input transconductor stage marked as reference
10
. The transconductor stage
10
includes a differential input with two input terminals
12
+ and
12
−, and a current output
14
. The input terminals
12
+ and
12
− respectively correspond to a non-inverting input and an inverting input. Output
14
is connected to a system of gain stages including, in order, a first intermediate stage
20
, a second intermediate stage
30
and an output stage
50
. The stages are connected in parallel between power supply terminals
1
and
2
.
The first and second intermediate stages and the output stage respectively include first, second and third bipolar transistors
22
,
32
and
52
in a common-emitter configuration. The transistors
22
,
32
and
52
are biased by respective current sources
24
,
34
and
54
. The base and collector of each transistor forms the respective input and output terminals of the corresponding stage.
The base of the first bipolar transistor
22
is connected to the current output
14
from the input stage
10
, and its collector is connected to the base of the second transistor
32
. Furthermore, the collector of the second transistor
32
is connected to the base of the third transistor
52
of the output stage. The collector of the third transistor
52
forms an amplifier output terminal
56
. The output terminal is more precisely identified as reference
56
. The output stage
50
is connected to an external load L shown as a discontinuous line. This load, which does not form part of the amplifier, is considered as having an impedance with a capacitive component equal to C
1
.
FIG. 1
also shows a number of capacitors. A second Miller capacitor
60
with value CM is connected between the input of the first stage
20
, i.e., the base of the first transistor
22
, and the amplifier output terminal
56
. A first Miller capacitor
62
with value CM
2
is connected between the base and the collector of the first transistor
22
, i.e., between the input and the output of the first intermediate stage
20
. A third Miller capacitor
63
with value CM
3
is connected between the base and the collector of the third transistor
52
, i.e., between the input and the output of the output stage
50
.
Capacitors
60
,
62
and
63
are frequency compensation capacitors that stabilize the amplifier in a closed loop. These capacitors are usually referred to as “Miller capacitors”. Other capacitors of the same type may be provided. In general, frequency compensation capacitors are connected between the input of a given stage and the output of the stage, or the output of a next stage, in the sequence of gain stages.
The terms “next” and “previous” used herein refer to a defined direction in the sequence of stages starting from the input stage and working towards the output stage. This is the direction in which a signal passes through the amplifier. The Miller capacitors and external capacitors connected to the amplifier govern its own frequency behavior and the frequency behavior of each of its stages. This behavior is characterized by poles. The poles correspond to the frequencies at which modifications to the gain slope are observed in a frequency response diagram or a Bode diagram. The Bode diagram expresses the amplifier gain as a function of the frequency of a signal passing through the amplifier.
As shown in the example in
FIG. 1
, a first pole p
1
can be defined corresponding to the output stage
50
and generated by the capacitive part of the external load L connected to the amplifier output. The expression of the first pole p
1
, for which the dimension is a pulse, is such that:
p
1
=
gm
3
C1
In this expression, C
1
is the capacitive value of the load L and gm
3
is the transconductance of the third transistor
52
, i.e., the output stage.
The first pole corresponds to a frequency f
1
such that:
f
1
=
P
1
2
π
In the same way, a second pole corresponding to the second intermediate stage
30
can be defined. This pole is an intermediate pole and corresponds to a pulse P
2
for which the expression is more complex. The result is:
P
2
=
CM
CM
2
×
gm
2
CM
3
CM, CM
2
, CM
3
are the respective values of the first, second and third capacitors, and gm
2
is the transconductance of the second transistor
32
. The second pole has a frequency:
f
2
=
P
2
2
π
.
Finally, a frequency called the unit gain frequency associated with the first capacitor
60
, with value equal to CM, is provided to stabilize the amplifier in a closed loop. The expression of the unit gain frequency of the amplifier, denoted f
gu
, is:
f
gu
=
gm
2
π
CM
In this expression gm denotes the transconductance of the input stage
10
.
The values CM, CM
2
and CM
3
must be chosen to satisfy the following stability equation in order to stabilize the amplifier, in other words, to avoid a parasitic oscillation phenomena:
f
gu
≦k
2
f
2
≦k
1
f
1
The variables k
1
and k
2
are multiplication factors such that k
2
>1, k
1
>1.
The equation shown above, called the first stability equation, represents the fact that the frequencies of the poles introduced in the successive stages from the input to the output of the amplifier must be increasing and distinct. This rule, applicable to the example in
FIG. 1
, remains true for an amplifier with a different number of gain stages. The values of the multiplication factors k and k′, usually equal to 2, must be chosen to be greater than 1 to insure that the poles are not coincident. A large value for these factors results in the amplifier having good stability.
As described above, the choice of Miller capacitors is dictated by the stability equation. The capacitors are chosen particularly to satisfy the stability equation when the transistors in the gain stages carry an amplifier rest current. This rest current is the current that conducts through the transistors in the gain stages when there is no signal applied to the amplifier input.
For a given stage with one or more bipolar transistors, the value of the transconductance depends on the current in the collector of the transistor(s). More precisely, for each intermediate stage:
gm
i
=
I
i
V
T
In this expression, gm
i
and I
i
respectively denote the transconductance and the collector current of the transistor in the stage considered. The term V
t
is a thermal voltage defined by:
V
t
=
kT
q
where T is the temperature, k is the Boltzmann constant and q is the electron charge. Thus, for a second intermediate stage in which the collector current is denoted IC
2
, we have:
gm
2
=
I
2
V
T
When a signal is applied to the amplifier input, collector currents different from rest currents pass through the transistor collectors. Thus, the values of pole frequenci
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Jorgenson Lisa K.
Shingleton Michael B.
STMicroelectronics S.A.
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