Patent
1995-06-07
1998-10-20
Harrell, Robert B.
G06F 305
Patent
active
058261117
ABSTRACT:
A system for real-time digital signal processing employs a single-chip microcomputer device (10) having separate on-chip program ROM (14) and data RAM (15), with separate address and data paths for program and data. An external program address bus (RA) allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus (D). A bus interchange module (BIM) allows transfer between the separate internal program and data busses (P-Bus and D-Bus) in special circumstances. The internal busses are 16-bit, while the ALU and accumulator (Acc) are 32-bit. A multiplier circuit (M) produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter (S) with sign extension.
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Caudel Edward R.
Magar Surendar S.
Bassuk Lawrence J.
Donaldson Richard L.
Harrell Robert B.
McClure C. Alan
Texas Instruments Incorporated
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