Asymmetric arbiter with fast signal path

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By presence or absence pulse detection

Reexamination Certificate

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Details

C327S403000, C370S462000, C340S870030

Reexamination Certificate

active

06188249

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to electrical components and more particularly to an asymmetric arbiter having a fast signal path.
BACKOGROUND OF THE INVENTION
In conventional computer systems, there is often a need to arbitrate between two signals. In many instances, two signals may arrive in parallel but the signals must be processed sequentially. A circuit commonly known as an “arbiter” decides which signal may proceed first for processing.
Conventional arbiters are “symmetric” in that both signal paths are roughly equal in terms of the delays. In other words, for a given pair of inputs, a and b, it takes approximately the same amount of time for one of the outputs of the arbiter (e.g. a-out or b-out) to appear. The symmetry between the signal paths helps to insure that neither signal is favored to win. As a result, the arbiter greatly simplifies the circuit analysis required for the environment in which the arbiter is present.
One of the drawbacks of such conventional arbiters is that they provide uniformity in the amount of delay at the price of ignoring potential optimizations.
SUMMARY OF THE INVENTION
The present invention addresses the limitations of the prior art by providing an asymmetric arbiter that includes a fast path over which one signal may travel very quickly. For an uncontested signal, the amount of delay introduced by the fast path is negligible. The fast path may be used by signals that appear frequently to minimize the amount of delay introduced by the arbiter. The other path in the arbiter (known as the “slow path”) may be used for signals that appear less frequently. The slow path is especially well adapted for signals in which delay is not a critical issue.
The arbiter operates by arbitrating between two signals at its inputs to allow one of the signals to pass through. The choice between the signals is based upon the time at which the signals arrive at the inputs. If a signal arrives early enough relative to the other signal, the earlier arriving signal forces the other signal path to become “closed” or “opaque.” The other signal can only get through after an acknowledge signal is received from the first signal path, indicating that the earlier arriving signal has been fully processed and that the system is ready to receive the other signal. The arbiter includes logic elements for making decisions as to which path is open and which path is closed.
The fast signal path may include a component for eliminating unwanted runt pulses. In one embodiment, this component is realized as a special variety of inverter. A Schmitt trigger may be a suitable component for preventing such unwanted runt pulses.
The slow signal path may include a delay element for imparting a fixed amount of delay. The fast signal path may include no such delay element and preferably introduces a negligible amounts of delay.


REFERENCES:
patent: 4398105 (1983-08-01), Keller
patent: 4403192 (1983-09-01), Williman
patent: 4924220 (1990-05-01), Mihara et al.
patent: 4998030 (1991-03-01), Cates
patent: 5049766 (1991-09-01), Driest et al.
patent: 0552507A1 (1993-07-01), None
patent: 0710911A1 (1996-05-01), None
patent: WO 8704827 (1987-08-01), None

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