Method of fabricating a self-aligned crown-shaped capacitor for

Details Method of fabricating a self-aligned crown-shaped capacitor for Method of fabricating a self-aligned crown-shaped capacitor for

1998-07-27

2000-05-16

Nelms, David

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438254, H01L 2120

Patent

active

060636831

ABSTRACT:
The method of the present invention for forming a capacitor on a semiconductor substrate includes the following steps. At first, a first oxide layer is formed over the substrate and a nitride layer is then formed over the oxide layer. A second oxide layer is formed over the nitride layer and a first silicon layer is formed over the second oxide layer. Next, a node opening is defined in the first silicon layer, the second oxide layer, and the nitride layer, upon the first oxide layer. Sidewall structures are then formed on sidewalls of the node opening. A contact opening is then defined in the first oxide layer under the node opening. The contact opening is defined in the first oxide layer under a region uncovered by the sidewall structures. The sidewall structures and a portion of the nitride layer nearby the node opening are removed to form undercut structures under the second oxide layer. A second silicon layer is then formed conformably over the contact opening, the undercut structures, the node opening, and the first silicon layer. A filling layer is formed over the second silicon layer. A planarizing is performed to planarize the substrate down to a surface of the second oxide layer. The filling layer and the second oxide layer are then removed. The nitride layer is also removed. A dielectric film is then formed conformably over the second silicon layer. Finally, a conductive layer is formed over the dielectric layer.

REFERENCES:
patent: 5998260 (1999-12-01), Lin
patent: 6004857 (1999-12-01), Hslao et al.
M. Sakao et al., A Capacitor-Over-Bit-Line (COB) Cell with a Hemispherical-Grain Storage Node for 64Mb DRAMs, 1990 IEEE, pp. 655-658.
H. Watanabe et al., A New Cylindrical Capacitor Using Hemispherical Grained Si (HSG-Si) for 256Mb DRAMs, 1992 IEEE, pp. 259-262.

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