Voltage supply discriminator and method

Details Voltage supply discriminator and method Voltage supply discriminator and method

1998-12-14

2001-10-02

Cunningham, Terry D. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C327S143000, C326S063000

Reexamination Certificate

active

06297683

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to voltage supply discriminator systems and circuits and more particularly to voltage supply discriminator circuits and methods that may be used for input/output (I/O) pads supplied by different supply voltages.
BACKGROUND OF THE INVENTION
Graphics controller chips, like many integrated circuit devices, utilize CMOS, logic cores, and associated input/output (I/O) pads as part of their circuit makeup. I/O pads include, for example, input/output buffers coupled to a common pad or pin. There is a constant challenge to continuously design smaller, faster and more complicated integrated circuits to provide increased functionality for multimedia applications and other applications. Typically, the logic core operates at a different supply voltage than the I/O pads. For example, with logic cores having gate lengths of 0.25 um and 50 angstroms gate oxide, a core logic supply voltage may be 2.5 volts. Corresponding supply voltages for the input/output pads, however, may be different supply voltages such as 3.3 volts. However, future generation chips require faster speeds and lower power consumption, hence, lower supply voltages so that the I/O pads can switch at faster frequencies.
Also, integrated circuits must often provide compatibility with older versions of interface circuits. As a result, an integrated circuit may require that the I/O pads operate at either a 3.3 volt level, or for example, at a lower 1.5 volt level. The gate length and gate oxide thickness of I/O pad transistors must also typically be decreased to provide faster circuits that draw less current. With multilevel supply voltages, multi-gate oxide devices are often used to provide the requisite logic levels and overvoltage protection. However, a problem arises when multi-gate oxide transistors are used on the same chip. Using differing gate thickness' requires additional fabrication processes and, hence, results in higher fabrication costs. Moreover, the larger gate lengths can slow the device down unnecessarily. For low voltage CMOS signaling, the input/output pad must also be designed to prevent static leakage and prevent damage due to gate-source or gate-drain overvoltage.
Having different supply voltages allows the chip to interface with other circuits that may have different supply voltages. As such, these interfaces can work with older technologies and newer technologies. The circuitry on the interface may need to obtain or receive logical information that is at different voltage levels depending upon the differing supply voltage.
One solution has been to provide an external pin on the chip which is then externally tied to ground or a power supply voltage. For example, an external pin is used and tied to ground or a voltage supply depending on whether the circuit is designed for a higher or lower supply voltage. As such, typical designs provide separate printed circuit board designs for one supply voltage and a different printed circuit board design for another supply voltage. The use of a separate pin becomes costly and increases the size of the chip. Moreover, each pin is becoming more and more precious due to the increased complexity of circuitry within the core logic and the size limit for the chip.
Consequently, there exists a need for a multi-voltage supply discriminator for use with among other things, an I/O pad on an integrated circuit that has core logic. It would be desirable to eliminate the need for an external or additional pin for use in detecting voltage supply differences.


REFERENCES:
patent: 5400290 (1995-03-01), Suma et al.
patent: 5898330 (1999-04-01), Klass
patent: 6014053 (2000-01-01), Womack
A.G.P. Design Guide: Covering 1X, 2X, and 4X Modes and 1.5 Volt and 3.3 Volt Signaling (Revision 1.0 Intel Corporation, Aug. 1998); and Accelerated Graphics Port Interface Specification (Revision 2.0, Intel Corporation, May 4, 1998).

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