Phase lock loop circuit

Details Phase lock loop circuit Phase lock loop circuit

1976-01-15

1977-01-04

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 25, H03B 304

Patent

active

040017133

ABSTRACT:
A phase locked loop circuit for a controlled oscillator employs a digital phase detector and maintains phase lock between trains of reference (R) pulses and controlled (C) pulses derived from the oscillator. Acquisition of a state of phase lock is aided by delaying or advancing the C-pulse relative to the next occurring R-pulse when the frequency of the C-pulses is higher or lower, respectively, than the R-pulse frequency. A frequency divider connected to the oscillator output is reset once during each cycle to produce C-pulses as an input to the phase detector and the R-pulse input to the phase detector is applied from a reference pulse source through a delay circuit. Logic elements responsive to the two phase detector inputs determine the relative frequencies of the latter and control operation of the frequency divider to either delay or advance the production of the C-pulse relative to the R-pulse without interrupting operation of the R-pulse source.

REFERENCES:
patent: 3813610 (1974-05-01), Kimura

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