Wafer surface treatment methods and systems using...

Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C156S345420, C118S232000, C216S038000, C451S036000, C451S285000, C438S693000, C438S697000

Reexamination Certificate

active

06191040

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to methods and systems for use in integrated circuit fabrication. More particularly, the present invention relates to the use of electrocapillarity in the treatment of wafer surfaces, e.g., planarization, coating, etc.
BACKGROUND OF THE INVENTION
In semiconductor wafer processing, various surface treatment steps are commonly performed. For example, such surface treatment may include application of a coating on the wafer surface or planarizing an exposed wafer surface prior to subsequent processing steps.
Planarization, such as chemical-mechanical planarization (CMP), is typically performed to achieve a planar surface over a wafer, sometimes referred to as “global planarity.” Typically, the planarization process involves a rotating wafer holder that holds a wafer. A slurry is applied to a rotating table or platen which has a polishing pad thereon. The polishing pad is applied to the wafer at a certain pressure to perform the planarization. In some planarization processes, the wafer holder may not rotate, the table or platen may not rotate and/or the platen may be moved in a linear motion as opposed to rotating. There are numerous types of planarization units available which perform the process in different manners.
In many circumstances, even after planarization has been performed, surface nonuniformities of the wafer are present. For example, because of different rotational speeds of the process at the center of the wafer as opposed to the edge of the wafer and different rotational speeds of the rotating table at the center and at the rotating table's periphery, the rate of removal tends to be different across the wafer surface. For example, the removal rate at the edge of the wafer may be higher than at the center of the wafer. Further, for example, the slurry may not be adequately transported to the entire contact area between the wafer and the pad such that further rate of removal differences are created. Slurry transport to the center of the wafer may also be inadequate when the surface is, or becomes as a result of planarization, substantially planar and further planarization is to be performed. This is because no gaps or nonuniformities are available to assist the transport of the slurry to the middle of the contact area. It is desirable to produce a wafer which is substantially uniformly flat across the wafer surface. Nonuniformity of the wafer surface, even after planarization, may be problematic. For example, such nonuniformity may lead to patterning or photolithography problems. Further, such nonuniformity may result in etching at undesirable depths on the wafer surface.
A wafer handling problem may also occur during wafer processing. For example, in some situations, the wafer can slip out of the holder and stick to the pad on the planarization platen. The wafer is then difficult to remove therefrom.
Other surface treatments, such as coating of wafer surfaces also benefit from surface uniformity. For example, uniform coating of photoresist or other polymer coatings on a wafer may be beneficial to a patterning process performed after such coating is applied. Conventionally, vapor priming is one method that has been used, for example, to minimize the amount of photoresist needed during a patterning process. The vapor prime helps “pre-wet” the semiconductor wafer and allows photoresist to flow out more smoothly, and thus more homogeneously. However, elimination of the need for vapor priming would decrease the number of steps in the patterning process.
For the above reasons, surface treatment methods and systems for performing such surface treatments, e.g, planarization, are needed to provide adequate uniformity of surfaces in wafer processing. The present invention as described below provides such improvements and overcomes the problems described above and those problems which will become apparent to one skilled in the art from the detailed description provided below.
SUMMARY OF THE INVENTION
A surface treatment method for use in integrated circuit fabrication in accordance with the present invention includes providing a substrate assembly having a surface. A liquid is provided adjacent the surface resulting in an interface therebetween. An electrical potential difference is applied across the interface and the surface is treated as the electrical potential difference is applied across the interface.
In one embodiment of the method, the liquid is a planarization liquid and treating of the surface includes planarizing the substrate assembly. In another embodiment of the method, the liquid is a coating material and the treating of the surface includes applying the coating material on the surface. In another embodiment of the method, the electrical potential difference is varied across at least a first portion of the interface relative to a second portion of the interface.
A planarization apparatus in accordance with the present invention includes a planarization element and a holder for supporting a substrate assembly having a surface. The holder is positionable for disposing the substrate assembly supported in the holder relative to the planarization element. A dispensing device provides a liquid planarization composition adjacent the surface resulting in an interface between the liquid planarization composition and the surface. An electrical potential difference is then applied across the interface as the substrate assembly is disposed relative to the planarization element.
A coating apparatus in accordance with the present invention includes a rotatable coating platform for supporting a substrate assembly having a surface and a dispensing device for introducing a liquid coating material at the surface of the substrate assembly resulting in an interface therebetween. An electrical potential difference is applied across the interface.


REFERENCES:
patent: 4193226 (1980-03-01), Gill, Jr. et al.
patent: 4811522 (1989-03-01), Gill, Jr.
patent: 5421729 (1995-06-01), Kutin
patent: 5533924 (1996-07-01), Stroupe et al.
patent: 5575706 (1996-11-01), Tsai et al.
patent: 5637185 (1997-06-01), Murarka et al.
patent: 6010964 (2000-01-01), Glass
Esmail et al., “Air Entrainment and Dynamic Contact Angles in Hydrodynamics of Liquid Coating,”Canadian J. Chem. Engineer., 68:197-203 (1990).
Rillaerts et al., “The Dynamic Contact Angle,”Chem. Engineer. Sci., 35:883-887 (1980).
Steigerwald et al., “Electrochemical Chemical Potential Measurements during the Chemical-Mechanical Polishing of Copper Thin Films,”J. Electrochem. Soc., 142:2379-2385 (1995).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Wafer surface treatment methods and systems using... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Wafer surface treatment methods and systems using..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wafer surface treatment methods and systems using... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2579582

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.