Circuit simulation with improved circuit partitioning

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

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C703S002000

Reexamination Certificate

active

06311146

ABSTRACT:

TECHNICAL FIELD
This invention relates to circuit simulators, and more particularly, to circuit simulators which partition the overall circuit into disjoint groups of components which are separately solved during the simulation process.
BACKGROUND OF THE INVENTION
It is well known in the art that it is desirable to simulate the operation of a circuit, e.g., to determine how the circuit will perform prior to physically building it. One prior art simulation technique develops a mathematical model to represent the circuit, which is then solved to indicate the operation of the circuit. This model is developed by entering into the circuit simulator a representation of the circuit, such as may be produced as the output of a schematic capture system, e.g. in the form of a netlist. The elements of a netlist generally correspond one to one with the schematic of the circuit to be simulated as it was input into the schematic capture system.
Next, the overall circuit is partitioned into disjoint groups of components as a function of circuit connectivity as described in the netlist. When a circuit is partitioned for eventual simulation, the various resulting groups of components typically have many inputs and outputs, each of which connect to others of the groups, or are inputs or outputs of the overall circuit. For purposes herein, the term “group” includes either the components which result from a partition of the circuit, or a behavioral model of a circuit which is merely a software description of the operation of a circuit without being embodied in a particular circuit implementation of the behavioral model. It is possible that one or more feedback loops, also known as cycles, will be formed among the interconnected groups, a loop being a sequence of groups such that each group in the sequence has an output connected to an input of the next group in the sequence and the last group in the sequence has an output connected to an input of the first group in the sequence.
The simulator has access to mathematical models for—i.e., equations and, if necessary, parameters representing—the devices included within the netlist, and, after partitioning, these models are employed to represent the individual devices. The resulting equations of groups are then separately solved during the simulation process. By solving each of the groups separately the computation burden of solving the circuit is reduced. Furthermore, this solution takes into account feedback within the group. Feedback among the groups is taken into account by circulating events, but such feedback cannot be solved in all cases.
Note that the circuit simulator may be implemented by a computer with appropriate software. One such commercially available simulator is ATTSIM available from Lucent Technologies, Inc., the documentation of which is incorporated herein by reference.
SUMMARY OF THE INVENTION
We have recognized that, disadvantageously, the presence of feedback loops among the groups can result in either multiple re-evaluations of many groups, or worse, oscillation, preventing further simulation. Therefore, in accordance with the principles of the invention, groups which are determined to belong to a loop may be merged into a single group. The length of the loop, which is the number of groups in the loop, determines whether or not the groups of a loop will be merged into a single group. More particularly, loops of a length less than or equal to a number are merged. The number may be specified by the user, or otherwise determined. Once a merged group is formed, its inputs and outputs are determined, and it is treated like any other previously existing group. In other words, the equations for the merged group are derived from the components in the merged group just as for any originally existing group. Preferably, not all the groups are merged into a single group, which would eliminate the advantages of partitioning the circuit to simulating it.


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