Stacked leads-over-chip multi-chip module

Details Stacked leads-over-chip multi-chip module Stacked leads-over-chip multi-chip module

1999-09-16

2001-10-09

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S118000, C438S126000, C438S127000, C438S613000, C257S777000

Reexamination Certificate

active

06300163

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to multi-chip modules, and, more specifically, to a LOC module having semiconductor dice attached to both sides of the module. A plurality of apertures formed in the module substrate allows passage of wire bonds from the active surface of the semiconductor dice attached to the bottom surface of the module through the substrate to connections on the top surface of the substrate. In addition, a plurality of chips is attached and electrically connected to the top surface of the substrate.
2. State of the Art
High performance, low cost, increased miniaturization of components, and greater packaging density of integrated circuits have long been the goals of the computer industry. Greater integrated circuit package density, for a given level of component and internal conductor density, is primarily limited by the space available for die mounting and packaging. For lead frame mounted dies, this limitation is, to a great extent, a result of conventional lead frame design.
A leads-over-chip (LOC) integrated circuit (IC) typically includes a semiconductor die (die) electrically attached to a LOC lead frame. In such an arrangement, the lead frame includes a plurality of lead fingers that extend over and are attached to the active surface of the die. The lead fingers are electrically connected to inputs and outputs (I/Os) or bond pads on the active surface and connect the die to external circuitry located on a substrate or other carrier. Moreover, the lead fingers actually provide physical support for the die. The lead frame and die are typically encapsulated within a plastic package, although ceramic and metal packages may also be used depending on the operating environment and the packaging requirements of the die.
With ever increasing demands for miniaturization and higher operating speeds, multi-chip module systems (MCMs) become increasingly attractive in a variety of applications. Generally, MCMs may be designed to include more than one type of die within a single package, or may include multiples of the same die, such as the single inline memory module (SIMM) or dual in-line memory module (DIMM). MCMs which contain more than one die can help minimize operational speed restrictions imposed by long connection traces between cooperating components by combining, for example, the processor, memory, and associated logic into a single package on a single printed circuit board or other substrate or carrier. In addition, MCMs offer packaging efficiency.
MCMs typically comprise a planar printed circuit board (PCB) or other die carrier substrate to which a plurality of semiconductor dice are attached. Laminated substrates such as FR-4 boards are included in the term PCB as used herein, as are ceramic and silicon substrates, although the latter constructions are at this time less common as MCM carrier substrates. The semiconductor dice are typically wire bonded, TAB-connected or flip chip bonded (by an array of solder or other conductive bumps or conductive epoxies) to the PCB. An MCM configuration typically allows semiconductor dice to be bonded to one side only of the carrier substrate. Moreover, for semiconductor dice that are wire bonded to the PCB, the bond wires extend from the top surface of each die mounted on one side of the PCB by its back side to the plane of the PCB surface on that side, requiring longer wires to be used to connect the dice to the PCB traces than if the active surfaces of the dice were closer to the PCB surface. This often leads to undesirable parasitic electrical characteristics.
Therefore, a need exists for an MCM that provides for increased densification by bonding chips to both sides of the PCB, while providing for shorter wire bonds between wire bonded dice and the MCM PCB.
SUMMARY OF THE INVENTION
Accordingly, the present invention relates to an MCM including a plurality of semiconductor dice attached thereto that is configured for attachment and connection of semiconductor dice to both sides of the PCB. Moreover, all of the semiconductor dice attached to the PCB are electrically connected to the same side of the PCB. This eliminates the added cost for providing dual-sided interconnect traces. This configuration accommodates conventional backside die attach and wirebond connection to the top side of the PCB as well as a flip-chip (face down) direct die attach on the top side of the PCB, in combination with an LOC arrangement with shortened wire bonds for semiconductor dice attached by their active surfaces to the bottom side of the PCB.
More specifically, the PCB has a plurality of slots or openings corresponding to the number of semiconductor dice attached to the bottom side thereof. These slots are smaller in size than the perimeter of the semiconductor dice, such that the PCB extends over at least a portion of the active surface of each die when the dice are attached active surface up to the bottom surface of the PCB. Each bottom semiconductor die includes a plurality of I/Os or bond pads on its active surface in the central region of the active surface of each die. When properly aligned for attachment, the I/Os of the semiconductor die lie within the opening in the PCB defined by the slot. The I/Os of each semiconductor die are subsequently connected (e.g., by wire bonding) to circuit traces located on the top surface of the PCB. The trace ends or bond areas of these traces generally lie near the perimeter of each slot for the shortest practical connection between the connections and I/Os of the die.
In one embodiment, the bottom surface of the PCB is substantially planar with a portion of the active surface of the semiconductor dice adhesively attached thereto. In another embodiment, the PCB includes recessed portions which extend a distance into the bottom surface of the PCB and are sized and shaped to receive a semiconductor die. In this latter embodiment, each recess is aligned with a corresponding slot such that the slot is positioned proximate the center of the recess. When the semiconductor dice are positioned and attached within each recess, the active surface of the die is positioned extremely close to the top surface of the PCB to shorten the length of the wire bond necessary to connect the I/Os to the trace ends on the top surface of the PCB. The depth of each recess may equal or exceed the thickness of the die to be received therein so that the die is fully enclosed in the recess.
The PCB may also include top and bottom walls positioned around the perimeter of the PCB and attached to the top and bottom surfaces of the PCB, respectively. A top lid sized and shaped to fit over the top wall may be attached thereto to completely enclose and seal in the top surface of the PCB and any semiconductor dice attached thereto. Similarly, a bottom lid sized and shaped to fit over the bottom wall may be attached thereto to completely enclose and seal in the bottom surface of the PCB and the attached semiconductor dice. These lids may actually be configured to contact surfaces of the semiconductor dice to provide a heat sink for the dice. In lieu of compartment-type packaging as described above, a glob top of epoxy or silicone may also be utilized to encapsulate each semiconductor die.
Although the MCM of the present invention has been described in relation to several preferred embodiments, a significant aspect of the invention is that the MCM accommodates semiconductor dice on both sides of a PCB or other substrate with those semiconductor dice located on the bottom surface wire bonded to the top surface through openings or slots in the PCB. All electrical connections are therefore made on one side of the PCB.


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patent: 4731645 (1988-03-01), Parmentier et al.
patent: 4748495 (1988-05-01), Kucharek
patent: 4931853 (1990-06-01), Ohuchi et al.
patent: 4991000 (1991-02-01), Bone et al.
patent: 4992849 (1991-02-01), Corbett et al.
patent: 4992850 (1991-02-01), Corbett et al.
patent: 4996587 (1991

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