Method for fabricating semiconductor device

Details Method for fabricating semiconductor device Method for fabricating semiconductor device

1998-05-27

2001-02-06

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Including adhesive bonding step

C438S106000, C438S119000

Reexamination Certificate

active

06184066

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device. More particularly, the present invention relates to a method for fabricating a semiconductor device in which a semiconductor chip is processed after the semiconductor chip is mounted on a substrate.
2. Description of the Related Art
One example of a conventional semiconductor device which is structured by mounting a plurality of semiconductor chips on a substrate is described in Photonics Technology Letters, vol. 7, No. 4, pp. 360-362 (1995). According to this conventional technique, several tens of GaAs multi quantum-well light modulators (hereinafter, simply referred to as the “light modulator(s)”) are integrated in a hybrid manner on a Si substrate having thereon a previously-formed CMOS transistor. The light modulator is supplied with a bias voltage by the CMOS transistor on the Si substrate, so that a reflectivity changes with respect to input light from the back side of the light modulator. As a result, the intensity of the reflected light is changed. In other words, the light modulator modulates the intensity of the reflected light by modulating the bias voltage, thereby performing signal processing.
FIGS. 18A-18D
are cross-sectional views showing steps of a conventional method for fabricating a semiconductor device.
First, as shown in
FIG. 18A
, Pb/Sn solders
1803
are provided in a predetermined pattern on a CMOS transistor
1805
formed on a Si substrate (not shown) and on a light modulator
1801
formed on a GaAs substrate
1802
, respectively.
Next, as shown in
FIG. 18B
, the Pb/Sn solders
1803
are fused so as to be bonded to each other. Thereafter, as shown in
FIG. 18C
, epoxy resin
1806
is heated so as to be at about 100° C., thereby reducing its viscosity, and injected between the CMOS transistor
1805
and the light modulator
1801
.
Then, as shown in
FIG. 18D
, the GaAs substrate
1802
is removed by wet etching. Upon performing the wet etching, the epoxy resin
1806
between the CMOS transistor
1805
and the light modulator
1801
serves as a layer for protecting the surface of the light modulator
1801
from an etchant. Finally, an antireflection film (not shown) is deposited on the surface of the light modulator
1801
after the GaAs substrate
1802
has been removed. Thus, the fabrication steps are completed.
According to the above-described conventional technique, the gap between the light modulator
1801
and the CMOS transistor
1805
is filled with the epoxy resin
1806
having a reduced viscosity. For that purpose, it is necessary to precisely control the heating temperature.
Furthermore, in the above conventional technique, voids (i,e., very small bubbles) may be generated in the epoxy resin
1806
. Thus, upon performing the wet etching, the surface of the light modulator
1801
may be damaged.
SUMMARY OF THE INVENTION
The present invention provides a method for fabricating a semiconductor device in which a semiconductor chip, having a first surface and a second surface substantially parallel to each other, is mounted on a submount such that the first surface faces the submount. The method includes: a first step of applying resin to at least one of the semiconductor chip and the submount; a second step of applying a pressure to the semiconductor chip and the submount so that the semiconductor chip and the submount are bonded to each other by the resin, resulting in electrical connection therebetween; and a third step of performing at least one of a film formation process, an etching process, a patterning process, and a washing process for the second surface of the semiconductor chip.
A step of inspecting operational characteristics of the semiconductor chip may be further performed between the second step and the third step.
Another semiconductor element may be formed on the second surface of the semiconductor chip in the third step.
The method may further include, after the third step: a fourth step of removing an oxide film generated on the second surface; and a fifth step of performing an atomic layer bonding of another semiconductor chip onto the second surface of the semiconductor chip. In that case, another semiconductor element may be formed on the second surface of the semiconductor chip in the fifth step.
The method may further include a step of disposing a plurality of the semiconductor chips on the submount substantially at the same time.
The method may further include the steps of: forming a region of a metal having a low melting point on at least one of the first surface of the semiconductor chip and the submount; and heating the metal to a temperature close to the melting point thereof.
Thus, the invention described herein makes possible the advantage of providing a method for fabricating a semiconductor device which is capable of efficiently processing the back surface of a semiconductor chip.
This and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.


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