Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-04-17
2001-07-24
Powell, William (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S737000, C438S740000
Reexamination Certificate
active
06265321
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to a method of metallization in the fabrication of integrated circuits, and more particularly, to a method of forming air gaps between metallization in the manufacture of integrated circuits.
(2) Description of the Prior Art
One of the methods of reducing RC delay in aluminum interconnects and copper damascene interconnects is to introduce low dielectric constant materials. In the aluminum interconnects, introduction of such low dielectric constant materials reduces predominantly the intra-metal capacitance. The most ideal candidate for the low dielectric constant material is air. In copper damascene interconnects, the integration concerns of organic low dielectric constant materials (e.g. FLARE) are being intensively addressed. In the meantime, the fabrication of dual and single damascene interconnects is being done using undoped silicon dioxide or doped silicon dioxide (e.g. FSG). One method of further lowering the dielectric constant of the silicon dioxide is to introduce air in the form of air plugs into the dielectric.
U.S. Pat. Nos. 5,324,683 and 5,510,645 to Fitch et al disclose a method of forming air gaps between metal lines by etching away spacers within the space between metal lines and covering the space with a non-conformal material which leaves air gaps where the spacers were. U.S. Pat. No. 5,461,003 to Havemann et al teaches filling gaps between metal lines with a polymer, depositing a porous dielectric layer over the polymer, then removing at least a portion of the polymer through the porous dielectric layer using an oxygen plasma treatment to leave air gaps between the metal lines. Havemann's polymer is a xerogel which may require a long processing time and may not be manufacturable. Control of porosity may not be reliable. U.S. Pat. No. 5,750,415 to Gnade et al teaches a porous silica precursor film over an underlying liquid material between metal lines. The liquid is removed through the porous film by evaporation leaving air gaps between the metal lines. U.S. Pat. No. 5,950,102 to Lee forms interconnects through multiple photoresist layers, then removes all of the photoresist leaving free-standing interconnects surrounded by air. U.S. Pat. No. 5,407,860 to Stoltz et al teaches depositing a spin-on-glass layer over metal lines having sidewall spacers. Air gaps are left between the spacers.
SUMMARY OF THE INVENTION
A principal object of the present invention is to provide an effective and very manufacturable method of metallization in the fabrication of integrated circuit devices.
Another object of the invention is to provide a metallization process using low dielectric constant materials.
Yet another object of the invention is to provide a method for reducing RC delay in integrated circuits by lowering the dielectric constant of the intermetal dielectric material between metal interconnects or metal damascene interconnects.
Yet another object of the invention is to provide an air bridge method of introducing air between metal lines in the fabrication of integrated circuits.
A further object of the invention is to provide an air bridge method to form dummy air plugs between damascene interconnects.
A still further object of the invention is to provide an air bridge method to form dummy air plugs after dual damascene processing.
In accordance with the objects of this invention a method for reducing RC delay in integrated circuits by lowering the dielectric constant of the intermetal dielectric material between metal interconnects or metal damascene interconnects is achieved. The dielectric constant of the intermetal dielectric is lowered by introducing air into the intermetal dielectric between metal interconnections. An air bridge comprising a porous material, preferably amorphous silicon, is deposited over a layer containing a reactive material. An oxygen plasma treatment or an anisotropic etching through the pores in the air bridge layer removes at least a portion of the reactive material, leaving air plugs within the intermetal dielectric.
Also, in accordance with the objects of this invention an air bridge method for introducing air between metal lines in the fabrication of integrated circuits is achieved. A plurality of metal lines is provided over an insulating layer on a semiconductor substrate wherein there is a space between two of the metal lines. A reactive material is deposited over the metal lines and filling the space between the metal lines. A porous material layer is deposited overlying the reactive material. The substrate is exposed to an oxygen plasma wherein the reactive material reacts with the oxygen plasma and is removed from the space between the metal lines through pores in the porous material thereby forming air gaps between metal lines in the fabrication of integrated circuits.
Also, in accordance with the objects of the invention, an air bridge method to form dummy air plugs between damascene interconnects is achieved. A metal line is provided overlying an insulating layer on a semiconductor substrate. A passivation layer is deposited overlying the metal line. A first intermetal dielectric layer is deposited overlying the passivation layer. The first intermetal dielectric layer is patterned to form spaces where planned dummy air plugs will be formed. A reactive material is deposited within the spaces. An air bridge layer is deposited overlying the patterned first intermetal dielectric layer and the reactive material. The substrate is exposed to an oxygen plasma treatment wherein the reactive material reacts with the oxygen plasma and is removed from the spaces in the intermetal dielectric layer through pores in the air bridge layer thereby forming dummy air plugs in the intermetal dielectric layer. Thereafter, a second intermetal dielectric layer is deposited over the air bridge layer. The intermetal dielectric layers are patterned to form a dual damascene opening. The dual damascene opening is filled with a metal layer to complete the dual damascene interconnects in the fabrication of integrated circuits.
Also, in accordance with the objects of the invention, an air bridge method to form dummy air plugs after dual damascene processing is achieved. Dual damascene interconnects are provided within a dielectric layer on a semiconductor substrate wherein the dielectric layer comprises at least an upper layer and a lower layer and wherein a passivation layer overlies the dual damascene interconnects. If the dielectric layer comprises a doped or undoped silicon dioxide material, the passivation layer and the upper layer of the dielectric layer are patterned to leave openings where dummy air plugs are to be formed. A reactive layer is deposited within the openings. An air bridge layer is deposited overlying the patterned passivation layer and the reactive layer. The substrate is exposed to an oxygen plasma treatment wherein the reactive material reacts with the oxygen plasma and is removed from the openings in the dielectric layer through pores in the air bridge layer thereby forming dummy air plugs in the dielectric layer. If the dielectric layer comprises an organic material, an air bridge layer is deposited overlying the passivation layer. A layer is formed overlying the air bridge layer having openings where dummy air plugs are to be formed. The passivation layer not covered by the masking layer is etched through pores in the air bridge layer to extend the pores into and through the passivation layer. The substrate is exposed to an oxygen plasma treatment wherein the organic material dielectric layer reacts with the oxygen plasma and is removed from the openings in the dielectric layer through pores in the passivation layer and in the air bridge layer thereby forming dummy air plugs in the dielectric layer. As an alternative to the oxygen plasma treatment, a portion of the dielectric layer not covered by the masking layer is anisotropically etched through pores in the air bridge and passivation layers thereby forming dummy air pores in the dielectric lay
Chooi Simon
Xu Yi
Zhou Mei-Sheng
Chartered Semiconductor Manufacturing Ltd.
Pike Rosemary L. S.
Powell William
Saile George O.
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