Active filter circuit

Details Active filter circuit Active filter circuit

2000-03-01

2001-02-27

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Unwanted signal suppression

C327S557000, C327S559000, C330S306000, C330S303000

Reexamination Certificate

active

06194959

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-064583, filed Mar. 11, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to an active filter circuit widely used for analog signal processing and, more particularly, to an active filter circuit applied to a MOS (metal oxide semiconductor) or MIS (metal insulator semiconductor) transistor IC circuit.
A variable GM amplifier constituted of current-output type differential amplifiers has been used as an active filter included in an IC capable of obtaining a desired frequency response. Various types of filter can be formed by applying the above variable GM amplifier to an active filter circuit.
FIG. 1
is a circuit diagram showing an arrangement of a trap filter using prior art GM amplifiers. The trap filter includes variable GM amplifiers
21
and
22
. A capacitor C
31
is inserted between a ground and a node of an output terminal of the GM amplifier
21
and a noninverting input terminal of the GM amplifier
22
. A capacitor C
32
is inserted between a noninverting input terminal of the GM amplifier
21
and an output terminal of the GM amplifier
22
. The output terminal of the GM amplifier
22
is connected to an inverting input terminal of the GM amplifier
21
through a buffer
23
and to that of the GM amplifier
22
through a buffer circuit
24
for controlling selectivity Q of the filter. The GM amplifiers
21
and
22
are supplied with a control signal in order to obtain a desired frequency response. It is an input signal X of the filter that is supplied to the noninverting input terminal of the GM amplifier
21
, while it is an output signal Y of the filter that is output from the GM amplifier
22
through the buffer
23
.
In the above arrangement, a transfer function of the output signal Y relative to the input signal X is expressed by the following equation:
Y
X
=
s
2
+
gm1
C
31
·
gm2
C
32
s
2
+
1
Q
⁢
gm2
C
32
⁢
s
+
gm1
C
31
·
gm2
C
32
(1-1)
where s is j&ohgr;, gm
1
and gm
2
are transconductances of the GM amplifiers
21
and
22
, and C
31
and C
32
are capacitances of the capacitors C
31
and C
32
.
As is apparent from the above equation (1-1), a desired frequency response can be obtained by controlling the transconductances gm
1
and gm
2
of the variable GM amplifiers
21
and
22
. For simplification of description, it is assumed that the selectivity Q of the filter is fixed.
FIG. 2
is a circuit diagram of a specific circuit arrangement generally used in the variable GM amplifiers shown in FIG.
1
. In this arrangement, the bases of differential pair transistors Q
1
and Q
2
are a noninverting input and an inverting input, respectively. Transistors Q
3
and Q
4
whose bases are connected to a voltage source VB, are voltage-to-current converters, the collectors thereof are connected to a power supply Vcc, and the emitters thereof are connected to the collectors of the transistors Q
1
and Q
2
, respectively. The emitters of the transistors Q
1
and Q
2
are connected to each other via a resistor R for determining a current conversion coefficient, and grounded through their respective constant-current sources of constant current I
1
.
The bases of transistors Q
5
and Q
6
of an output control system are connected to their respective collectors of the transistors Q
2
and Q
1
. Both the emitters of the transistors Q
5
and Q
6
are grounded through a constant-current source of constant current I
2
. The collectors of the transistors Q
5
and Q
6
output a differential current.
The circuit shown in
FIG. 2
is a basic Gilbert circuit, and a transfer function from input V
i
to output current I
o
(=I
5
−I
6
) is given by the following equation:
Io
=
1
R
⁢
I
2
I
1
⁢
V
i
(2-1)
where I
1
and I
2
are values of constant currents I
1
and I
2
in FIG.
2
.
As is evident from the above equation (2-1), the transconductance gm of the circuit illustrated in
FIG. 2
is expressed by the following equation:
gm
=
1
R
⁢
I
2
I
1
(3-1)
As is evident from the equation (3-1), the transconductance gm is controlled by a ratio of I
1
to I
2
. It is understood that the frequency response of the filter shown in
FIG. 1
is variable if the constant currents I
1
and I
2
are control signals in the filter circuit while I
1
is a fixed current and I
2
is a variable current.
The above prior art variable GM amplifiers are so constituted that they compress and expand an input signal and transfer it, making use of diode characteristics of a bipolar transistor. Thus, the prior art amplifiers have the following problem.
Let us consider noise performance first. In the circuit arrangement shown in
FIG. 2
, an input signal is compressed by a differential circuit constituted of the pairs of transistors Q
1
and Q
2
and transistors Q
3
and Q
4
and then expanded by the pair of transistors Q
5
and Q
6
.
The noise dominant over the above circuit is a shot noise of the pair of transistors Q
3
and Q
4
and that of transistors Q
5
and Q
6
. The shot noise is thus added to the compressed input signal to thereby deteriorate the noise performance. Moreover, noise is caused to such an extent that a thermal noise of in-base resistance (rbb′) of each transistor is not negligible.
The following two methods are generally adopted in order to improve the noise performance described above:
(1) The currents I
1
and I
2
are increased to reduce an input conversion noise. In other words, the I/O dynamic range is increased to improve the S/N ratio equivalently.
(2) The base area of transistors is increased to reduce the in-base resistance rbb′ and improve the noise performance.
It is likely that the above two methods will improve the noise performance to some extent, but it is inevitable that they will increase the current consumption. The increase in current requires a transistor of a certain size. In order to lower the in-base resistance rbb′, a larger-sized transistor has to be employed. The device size is increased accordingly.
In a commonly-used filter circuit as described above, the noise performance as well as the frequency response required in accordance with its uses is considered to be important. Moreover, the filter circuit is required very strongly to decrease in power consumption and increase in degree of integration in accordance with recent multifunction and high performance of an IC.
Using a prior art variable GM amplifier makes it difficult to improve in filter performance including noise performance, reduce in power consumption, and increase in degree of integration at the same time.
Next, let us consider that a differential amplifier is constituted of MOS or MIS transistors. Using MOS or MIS transistors, both low power consumption and high degree of integration can be expected.
FIG. 3
is a circuit diagram of a generally-used differential amplifier constituted of MOS transistors. In this amplifier, the sources of N-channel MOS transistors M
41
and M
42
whose gates are supplied with a differential input signal, are grounded through their common constant-current source I
o
. The sources of P-channel MOS transistors M
43
and M
44
are connected in common to the power supply, and the drains thereof are connected to their respective drains of the MOS transistors M
41
and M
42
. The gates of the MOS transistors M
43
and M
44
are connected in common to the drain of the MOS transistor M
43
to constitute a current mirror circuit. A current Iout is output from a drain node of the MOS transistors M
42
and M
44
.
In
FIG. 3
, currents i
11
and i
12
are given by the following equations in view of the characteristics of MOS transistors if V
1
, V
2
and V
m
are voltages and g is conductance:
i
11
=g
(
V
1
−V
m
−V
th
)
2
i
12
=g
(
V
2
−V
m
−V
th
)
2
Since i
11
+i
12
=I
o
(constant current), the output current is expressed by the following

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