Electric lamp and discharge devices – With gas or vapor – Three or more electrode discharge device
Reexamination Certificate
2000-04-13
2001-12-11
Patel, Ashok (Department: 2879)
Electric lamp and discharge devices
With gas or vapor
Three or more electrode discharge device
C313S586000
Reexamination Certificate
active
06329752
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plasma display panel, and more particularly, to a plasma display panel driven such that it is separated into an upper panel and a lower panel.
2. Description of the Related Art
FIG. 1
shows a three-electrode surface-discharge alternating-current plasma display panel. Referring to the drawing, address electrode lines A
1
, A
2
, A
3
, . . . , A
m−1
and A
m
, a dielectric layer
11
, scan electrode lines Y
1
, Y
2
, . . . , and Y
n
, common electrode lines X
1
, X
2
, . . . , and X
n
and a MgO protective film
12
are provided between front and rear glass substrates
10
and
13
of a surface-discharge plasma display panel
1
.
A partition wall
15
and the address electrode lines A
1
, A
2
, A
3
, . . . , A
m−1
and A
m
coat the entire surface of the rear glass substrate
13
in a parallel pattern. Here, the partition wall
15
partitions a discharge space accurately during the operation of the plasma display panel
1
. A phosphor (not shown) may coat the front surface of the address electrode lines A
1
, A
2
, A
3
, . . . , A
m−1
and A
m
. Otherwise, the phosphor may coat a dielectric layer in the event the dielectric layer coats the front surface of the address electrode lines A
1
, A
2
, A
3
, . . . , A
m−1
and A
m
.
The common electrode lines X
1
, X
2
, . . . , and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , and Y
n
are arranged on the rear surface of the front glass substrate
10
orthogonal to the address electrode lines A
1
, A
2
, A
3
, . . . , A
m−1
and A
m
in a predetermined pattern. The respective intersections define corresponding pixels. The dielectric layer
11
is entirely coats the rear surface of the common electrode lines X
1
, X
2
, . . . , and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , and Y
n
. The MgO protective film
12
for protecting the panel
1
against strong electrical fields entirely coats the rear surface of the dielectric layer
11
. A gas for forming a plasma is hermetically sealed in a discharge space
14
. The sealing process will now be briefly described. The discharge space
14
is exhausted through an exhaust pipe provided in the discharge space
14
of the sealed panel
1
, thereby increasing the degree of vacuum. The gas for forming a plasma is injected into the discharge space
14
through the exhaust pipe and then the exhaust pipe is hermetically sealed.
Referring to
FIG. 2
, in a conventional plasma display panel of a separation drive type, address electrode lines are divided into upper lines A
1U
, A
2U
, A
3U
, . . . , A
m−1U
and A
mU
and lower lines A
1L
, A
2L
, A
3L
, . . . , A
m−1L
and A
mL
and separately driven, while each partition wall
15
remains without being separated.
According to the conventional plasma display panel of a separation drive type, the vacuum-conductance of the discharge space (
14
of
FIG. 1
) is lowered due to the partition wall
15
. Thus, the exhaustion of the discharge space
14
does not occur properly. In particular, impurities remaining in the middle of the partition wall
15
deteriorate the purity of the gas for forming a plasma, thereby degrading the picture quality of the plasma display panel (
1
of FIG.
1
).
The driving method generally adopted for the plasma display panel described above is an address/display separation driving method in which a reset step, an address step and a sustain discharge step are sequentially performed in a unit sub-field. In the reset step, wall charges remaining in the previous sub-field are erased. In the address step, the wall charges are formed in a selected pixel area. Also, in the sustain discharge step, light is produced at the pixel at which the wall charges are formed in the address step. In other words, if alternating pulses of a relatively high voltage are applied between the common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
, a surface discharge occurs at the pixel at which the wall charges are located. Here, a plasma is formed at the gas layer of the discharge space
14
and the phosphors
142
are excited by ultraviolet rays and emit light.
SUMMARY OF THE INVENTION
To solve the above problem, it is an object of the present invention to provide a plasma display panel driven such that each of address electrode lines is divided into at least two parts, by which the purity of a gas for forming plasma hermetically sealed in a discharge space can be increased.
Accordingly, to achieve the above object, there is provided a plasma display panel in which common electrode lines, scan electrode lines and address electrode lines are arranged between a front substrate and a rear substrate facing each other to be spaced apart from each other, the common electrode lines and scan electrode lines are arranged in parallel, the address electrode lines are arranged to be orthogonal to the scan electrode lines to define pixels at each intersection, partition walls for accurately defining a discharge space are formed to be parallel to the address electrode lines, and the address electrode lines are divided into at least two parts to be separately driven, wherein the respective partition walls are divided at locations where the address electrode lines are divided to produce passages due to spacing.
Pixels are not formed at locations where the address electrode lines are divided. Thus, even if the respective partition walls are divided at these locations, the picture quality is not adversely affected. According to the plasma display panel of the present invention, since the vacuum-conductance of the discharge space is increased by passages formed by division of the partition walls, uniform and smooth exhaustion of the discharge space can occur in the course of manufacturing the plasma display panel. In particular, since no impurity remains in the middle of the partition walls, the purity of the gas for forming plasma is uniformly increased, thereby further improving the picture quality of the plasma display panel.
Preferably, a distance due to spacing between the partitions walls is less than or equal to a distance due to spacing between the address electrode lines. The reason of the foregoing is that there may be no partition wall even in pixel areas if the distance due to spacing between partitions walls is greater than the distance due to spacing between address electrode lines.
REFERENCES:
patent: 5663611 (1997-09-01), Seats et al.
patent: 5914563 (1999-06-01), Lee et al.
Clove Thelma Sheree
Leydig , Voit & Mayer, Ltd.
Patel Ashok
Samsung SDI & Co., Ltd.
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