Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
1997-12-09
2001-07-31
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S840000, C029S841000, C029S830000, C438S118000, C439S066000
Reexamination Certificate
active
06266872
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to microelectronic assemblies, and more specifically it relates to connection components which facilitate electrical interconnections between a microelectronic element, such as a semiconductor chip, and an external circuit element, such as a printed circuit board.
BACKGROUND OF THE INVENTION
Connection components, such as interposers and substrates, are typically used in combination with microelectronic elements, such as semiconductor chips, to facilitate electrical interconnections between semiconductor chips and external circuit elements. The reliability of the entire circuit operation depends upon the electrical connections between the chip, the interposer and the external circuit elements. To enhance reliability, a compliant layer is frequently used between the interposer and the semiconductor chip in order to permit movement of terminals on the interposer with respect to electrical contacts on the semiconductor chip during testing, assembly and thermal cycling.
Such a compliant layer is shown, for example, in U.S. Pat. No. 5,148,266, the disclosure of which is incorporated herein by reference. According to certain embodiments shown in the '266 patent, a semiconductor chip having a front face including a plurality of peripheral contacts is connected to an external circuit board through a flexible, dielectric interposer. The interposer has terminals and includes flexible leads for interconnecting the contacts on the chip with the terminals on the interposer so that the terminals are movable relative to the contacts on the chip which provides excellent resistance to thermal cycling differences between the chip and the external circuit board. The flexible interposer may be supported by a compliant layer which allows the terminals to move relative to the contacts on the chip.
Copending, commonly assigned U.S. patent application Ser. No. 08/365,699 entitled “Compliant Interface for a Semiconductor Chip and Method Therefor” filed Dec. 29, 1994, the disclosure of which is incorporated herein by reference, discloses a method of fabricating a compliant interface for a semiconductor chip typically comprised of a compliant layer having a controlled thickness. In certain preferred methods according to the '699 application, a first support structure, such as a flexible, substantially inextensible dielectric film having electrically conductive parts, is assembled with a second support structure, such as a semiconductor chip having a plurality of contacts on a contact bearing face. A resilient element, such as a plurality of compliant pads which define channels therebetween, are disposed between the dielectric film and the contact bearing face of the semiconductor chip. After the dielectric film and the semiconductor chip have been assembled, the electrically conductive parts of the dielectric film are bonded to the contacts on the semiconductor chip. A compliant filler, such as a curable liquid, is then injected into the channels between the chip and the dielectric film and around the compliant pads while the chip and dielectric film are held in place. The filler may then be cured to form a substantially uniform, planar, compliant layer between the chip and the dielectric film.
In some cases, a connection component can be prefabricated. The prefabricated component can be stored for later assembly and bonding to a semiconductor chip, and can also be shipped from the component manufacturer to a chip subassembly plant where the component is united with the semiconductor chip. In such prefabricated components, the compliant layer may often be coated on its exposed surface with adhesive, and a peelable release layer may be applied over the adhesive to protect and preserve it. Copending commonly assigned U.S. patent application Ser. No. 08/872,379, filed Jun. 10, 1997, the disclosure of which is incorporated by reference herein, discloses a method of fabricating a compliant interface for a semiconductor chip comprising a resilient element having one or more intermediary layers capable of being wetted by an adhesive. In one preferred embodiment according to the disclosure, a layer of fibrous material, such as paper, is provided at one or more surface regions of the curable elastomer and the elastomer is then cured while in contact with the paper. The resilient element provided by the disclosed methods can be removed from storage and used with an adhesive to bond the resilient element to one or more microelectronic elements.
Problems may arise when compliant layers are applied to connection components which are then stored for a prolonged period of time prior to being assembled to another microelectronic element, such as a semiconductor chip. These difficulties may result from the presence of low molecular weight substances in the compliant layer which can exude from the compliant layer and contaminate the electrical parts. For example, where a resilient element incorporating silicone compounds is present on a connection component for many months, the silicone may contaminate the leads of the connection component which could ultimately impede the formation of strong bonds between the leads and the contacts on the chip.
Solutions to this problem are disclosed in commonly assigned U.S. patent application Ser. No. 08/879,922, filed Jun. 20, 1997, the disclosure of which is incorporated by reference herein. In certain preferred embodiments, the '922 application discloses a transferable resilient element or compliant layer which is stored separate and apart from a connection component and a semiconductor chip until immediately prior to assembly of the component and the chip. The compliant layer is preferably stored between one or more storage liners and has one or more tacky surface regions so that the compliant layer can be easily assembled between and adhered to opposing faces of a connection component and a semiconductor chip at the desired time. By keeping the compliant layer separate and apart from the connection component and the semiconductor chip until immediately prior to assembly of the semiconductor package, contamination of the electrically conductive parts is avoided.
Despite the positive results of the aforementioned commonly owned inventions, the disclosures of which are incorporated herein by reference, still further improvements and alternatives would be desirable.
SUMMARY OF THE INVENTION
One aspect of the present invention provides a method of manufacturing a microelectronic assembly. A method in accordance with this aspect of the invention includes providing a connection component having a dielectric element with electrically conductive parts; providing a fugitive material in contact with the dielectric element and providing a curable material on the dielectric element after providing the fugitive material and curing the curable material to provide a compliant element, wherein the fugitive material isolates the electrically conductive parts from the compliant element. The method also includes storing the connection component with the fugitive material and the compliant element; after the storing step, removing the fugitive material from the connection component; and after the removing step, connecting the electrically conductive parts to a microelectronic element such as a semiconductor chip. The step of removing the fugitive material may further include the step of chemically treating the fugitive material. The removing step is preferably performed just shortly before the step of connecting the electrically conductive parts to one another, typically less than 24 hours before the connecting step and most preferably less than one hour before the connecting step.
As used herein, the term “fugitive material” means a material which can be removed by application of heat, radiation, ultraviolet light or chemical treatment without destruction of the dielectric element, the electrically conductive parts or the compliant element. Typically, the fugitive material includes a water soluble material, and may includ
Arbes Carl J.
Lerner David Littenberg Krumholz & Mentlik LLP
Tessera Inc.
Trinh Minh
LandOfFree
Method for making a connection component for a semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for making a connection component for a semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for making a connection component for a semiconductor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2557797