Low thermal expansion circuit board and multilayer wiring...

Stock material or miscellaneous articles – All metal or with adjacent metals – Composite; i.e. – plural – adjacent – spatially distinct metal...

Reexamination Certificate

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Details

Other Related Categories

C428S209000, C428S458000, C428S473500, C428S901000

Type

Reexamination Certificate

Status

active

Patent number

06180261

Description

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a low thermal expansion circuit board and a multilayer wiring circuit board on which semiconductor elements can be mounted with high reliability and ease.
BACKGROUND OF THE INVENTION
With the recent tendencies for electronic equipment to have a smaller size and higher performance, it has been demanded for semiconductor devices constituting electronic equipment and multilayer printed wiring boards for mounting the devices to have a reduced size, high performance and high reliability. To meet these demands pin insertion mounting is being displaced by surface mounting, and, in recent years, a surface mount technology called bare chip mount has been under study, in which bare semiconductor elements are directly mounted on a printed board. The chips used in bare chip mount, which are not packaged, are usually encapsulated with an encapsulating resin called an underfilling material. The main object of the underfilling material is to disperse the stress produced by the difference in coefficient of thermal expansion between a circuit board and a semiconductor element. Therefore the underfilling material must keep a certain modulus of elasticity even in high temperature. From this viewpoint, thermosetting resins are usually used as an underfilling material.
The underfilling material (usually a thermosetting resin) is generally cast in the gap under a semiconductor element bonded to a circuit board, followed by post curing. However, the conventional technique involves various problems such as a low yield, a long post curing time, and poor repairability. It has therefore been demanded to develop a circuit board on which semiconductor elements can be mounted easily with high reliability.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a low thermal expansion circuit board and a multilayer wiring circuit board on which semiconductor elements can be mounted with ease and high reliability.
The above object is accomplished by a low thermal expansion circuit board comprising an insulating layer having an Ni—Fe-based alloy foil or a titanium foil as a core, a wiring conductor on both sides thereof, and an adhesive resin layer on the side on which a semiconductor element is to be mounted (hereinafter simply referred to as a mount side).
The object is also accomplished by a multilayer wiring circuit board having a plurality of low thermal expansion circuit boards laminated integrally each comprising an insulating layer having an Ni—Fe-based alloy foil or a titanium foil as a core, a wiring conductor on both sides thereof, and an adhesive resin layer on the mount side thereof.
In order to develop a circuit board meeting the above-mentioned object, the inventors of the present invention have conducted extensive studies. They aimed chiefly at reduction of the thermal expansion coefficient of a circuit board itself, taking the trend into consideration that semiconductor elements will increase in size. As a result, they have found that the coefficient of thermal expansion of a circuit board approaches that of a semiconductor element by using an insulating layer having an Ni—Fe-based alloy or titanium foil as a core whereby the stress generated from the difference in thermal expansion coefficient between the circuit board and the semiconductor element can be diminished, enabling highly reliable bare chip mount. They have additionally found that a semiconductor element can be mounted and encapsulated extremely easily when an adhesive resin layer is previously provided on the mount side of the circuit board. The ease and high reliability in bare chip mounting are similarly enjoyed in the multilayer wiring circuit board comprising a plurality of such low thermal expansion circuit boards.
It is preferred for the adhesive resin layer to mainly comprise a thermoplastic resin or polycarbodiimide having a skeleton represented by formula (I):
&Parenopenst;(R—N═C═N)&Parenclosest;
n
  (I)
wherein R represents a divalent organic group; and n represents an integer of 2 to 100. In this case, the resin layer easily softens on re-heating so that a semiconductor element once mounted thereon can easily be detached. In other words, the circuit board has excellent repairability.


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Japanese Abstract of Japanese Patent 8306415, dated Nov. 22, 1996.

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