Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor
Reexamination Certificate
1999-12-20
2001-05-08
Dinkins, Anthony (Department: 2831)
Electricity: electrical systems and devices
Electrostatic capacitors
Fixed capacitor
C361S311000, C361S321300
Reexamination Certificate
active
06229685
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to capacitors within devices of semiconductor chips, and more particularly, to the formation of capacitors within a semiconductor device.
2. Description of the Related Art
Today's semiconductor devices are continually being pushed to meet stricter demands. As devices using this technology inundate the marketplace, consumers place higher demands on them. These demands include smaller, more compact devices with greater functionality.
For instance, some semiconductor applications require the integration of both digital circuitry and radio frequency (RF) circuitry in the same chip. To accomplish this, it is necessary to fabricate very specific capacitive structures. Such applications include, for example, cellular phones, portable communication devices, and other electronic devices that implement both digital and RF circuitry. In specific applications, the capacitive structures are used in RF signal processing to eliminate both low frequency components as well as direct current (DC) components from an RF signal. To date, semiconductor manufacturers have been forced to fabricate capacitors from portions of metallization lines.
The separate metallization line was required to form the individual plates necessary for a capacitor. One metallization line was required to form the top plate of the capacitor and another metallization line was required to form the bottom plate of a capacitor. The metallization line used for the capacitor would therefore not be available for routing signals in the particular metallization level. As such, if the integrated circuit design was designed to have dense interconnect routing, the simple implementation of a capacitor would sometimes force the addition of another metallization level to complete the required routing. This, of course, increased the size of a chip and cost of the semiconductor device. In addition, the larger a chip becomes, the more expensive it will be to package the device. Additionally, the capacitance of the capacitors used in the prior art was not that high because of the materials used for the capacitor. The prior art used standard dielectric material between the lines, as is typically done with standard interconnect structures. As a result, designers would frequently not be able to rely on these type of capacitors either because not enough capacitance was generated or because the structure became too large for the particular application. For instance, if the capacitor were too small, the function of filtering low frequency signals and/or DC signals could not be adequately accomplished.
In some cases, designers are forced to implement discrete components such as capacitors outside of the chip (i.e., on the printed circuit board) in order to complete the desired function. This also increases the cost of the resulting device.
In view of the foregoing, there is a need for a method of making capacitors in standard interconnect metallization structures. There is also a need for capacitor structures that do not occupy standard routing space on metallization levels within a semiconductor device. Additionally, there is a need for a capacitor with better performance characteristics, which can be fabricated without expensive non-standard fabrication operations.
SUMMARY OF THE INVENTION
Broadly speaking, the present invention fills these needs by providing a capacitor that has better performance characteristics and may be fabricated without expensive non-standard fabrication operations. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device, or a method. Several inventive embodiments of the present invention are described below.
In one embodiment, a capacitor is disclosed. The capacitor includes a metallization line with a high dielectric constant layer defined over the metallization line. The high dielectric constant layer has a thin metallization film defined over it such that the thin metallization film defines a top plate of the capacitor. The high dielectric constant layer defines a dielectric for the capacitor, and the metallization line defines a bottom plate for the capacitor. The metallization line is defined from a metallization level and the thin metallization film is defined before a next metallization level above the metallization level is defined.
In another embodiment, a method for making a capacitor is disclosed. A metallization line is first defined with a high dielectric constant layer formed over the metallization line. A thin metallization film is then formed over the high dielectric constant layer such that the thin metallization film defines a top plate of the capacitor. The high dielectric constant layer defines a dielectric of the capacitor with the metallization line defining a bottom plate of the capacitor. The metallization line is defined from a metallization level and the thin metallization film is defined before a next metallization level.
In a further embodiment, a capacitor is disclosed. The capacitor includes a bottom plate, a dielectric and a top plate over the dielectric. The bottom plate is defined from a metallization line and the dielectric is made from a high dielectric constant layer disposed over the bottom plate. The top plate is defined from a thin metallization film that is disposed over the high dielectric constant layer. The thin metallization film is defined such that it is between the metallization line and a next metallization layer.
The many advantages of the current invention should be recognized. The present invention allows for the formation of a capacitor within a semiconductor device without the addition of extra metallization layers. The capacitor is made over a metallization layer before the next metallization layer is formed. Therefore, the present invention does not require extra or special space within the semiconductor device for formation. The present invention is fabricated using standard fabrication techniques for semiconductor devices, thus no special or time consuming fabrication steps are required. Also, the present capacitor has the ability of having a higher capacitance than the prior art while using less space, thereby increasing its ability to filter low frequency and/or DC signals. Consequently, a capacitor made in accordance with the present invention allows designers to make semiconductor devices having capacitors which may be packaged more efficiently without greatly increasing the cost or time of fabrication with the added advantage of having higher capacitance.
Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.
REFERENCES:
patent: 5142437 (1992-08-01), Kammerdiner et al.
patent: 6146996 (2000-11-01), Sengupta
Bothra Subhas
Gabriel Calvin T.
Pramanik Dipankar
Dinkins Anthony
Martine Penilla & Kim LLP
Philips Electronics North America Corp.
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