Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-11-04
2001-09-04
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S710000, C438S720000, C438S775000
Reexamination Certificate
active
06284663
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a method for making electronic devices with thin film dielectrics and to the resulting devices.
BACKGROUND OF THE INVENTION
Field effect devices, such as field effect transistors, are fundamental components in modern electronics. The metal-oxide semiconductor field effect transistor (MOSFET) is a dominant and important device in fabricating very large-scale integrated circuits, and various types of MOSFETs are known. MOSFET technology basically can be categorized as consisting of NMOS, PMOS, and CMOS technology. NMOS denotes n-channel MOS devices, PMOS denotes p-channel devices, and CMOS denotes devices having n-channel and p-channel areas integrated on the same chip. Other acronyms are used to identify MOSFETs, including DMOS (wherein “D” stands for “diffusion” or “double diffusion”), IGBT (Insulated Gate Bipolar Transistor), BiCMOS (CMOS having bipolar devices), and DGDMOS (Dual Gate DMOS).
MOSFET devices typically comprise a controllable-conductivity path, called a channel, disposed between a source and a drain. A gate electrode is formed on a thin dielectric film overlying the channel. For example, the source and the drain can be n-type regions of silicon, and the channel can be a p-type region connecting them. The gate electrode can be a conductively doped polysilicon layer formed on a thin layer of silicon oxide dielectric overlying the channel.
If no voltage is applied to the gate, current cannot flow from the source to the channel or from the channel to the drain. However, if a sufficient positive voltage is applied to the gate, electrons are induced into the channel region, thereby creating a continuous conductive path between the source and the drain.
Capacitors are also important components of integrated circuits. A typical capacitor comprises first and second conductive layers separated by a thin dielectric film.
A capacitor may be fabricated on an MOS device to form a memory cell. For example, a common design used in a dynamic random access memory (DRAM) cell involves a transfer gate (e.g., a MOSFET), and a storage node consisting of a capacitor. A common design for a DRAM cell is shown in FIG.
1
. This cell includes a substrate
12
, comprised typically of silicon, containing source
13
and drain
14
diffusions for the MOFSET. Gate structures
16
a,
16
b
are fabricated on the substrate. The substrate
10
also will have on its surface a field oxide pattern (or FOX)
18
. The capacitor portion
40
is disposed on the gates, comprising a bottom electrode
20
and top electrode
21
, separated by a thin film of dielectric material
22
. The bottom electrode
20
and top electrode
21
, together with the interlying thin dielectric film
22
, form a capacitor. An insulating layer
24
may separate the capacitor from the gate structures
16
a,
16
b.
The reliable operation of integrated circuits is dependent on the reliability of the increasingly thin dielectric layers used in circuit devices. As transistors have become smaller and more densely packed, the dielectrics have become thinner. Capacitor and gate dielectrics are often less than 80 angstroms in thickness and are approaching 50 angstroms or less. For integrated circuits to work, these thin layers in each of thousands of different transistors must provide sufficient capacitance to drive the device, protect the channel from migration of impurities, and avoid production of charge traps at their interfaces. These demanding requirements may soon exceed the capacities of conventional silicon oxide layers. Silicon oxide layers less than 2 nm will have prohibitively large leakage currents.
Efforts to replace silicon oxide as the gate dielectric have thus far proved less than satisfactory. The relatively low dielectric constant (≈3.9) of silicon oxide limits the scaling of transistors to smaller sizes, because the capacitance may not be sufficient to drive the devices. Higher dielectric constant materials are being developed. For example, tantalum oxide has been tried as a dielectric layer of a capacitor portion of a DRAM cell (e.g., layer
22
of FIG.
1
). However, in this case reactions occur between the lower metal electrode (e.g.,
20
of
FIG. 1
) and the oxide film
22
to partially oxidize the electrode
20
. This partial oxidation creates suboxides at the interface of the metal electrode and the dielectric. The partially oxidized layer thus formed can have a high density of electron traps that can lower the capacitance of the structure and increase leakage current. Accordingly, there is a need for an improved method for making devices having thin layers of high dielectric constant and particularly layers of dielectric constant used in a capacitor portion of an electronic device such as a DRAM cell.
SUMMARY OF THE INVENTION
Summarily described, the invention embraces a process for forming an electronic device having a capacitor portion. A film of metal is deposited on a surface such as the surface of an insulating or dielectric layer overlying a substrate. The metal film may be patterned such as with use of a photoresist or metal etching. A metal oxide layer is deposited on the metal film, and the top electrode is formed. The structure is exposed to a remote plasma of nitrogen after the metal oxide layer is deposited and before forming the top electrode. The plasma substantially reduces the density of charge traps at the metal electrode/dielectric interface through incorporation of nitrogen at the interface.
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patent: 6001741 (1999-12-01), Alers
Agere Systems Guardian Corp.
Lowenstein & Sandler PC
Umez-Eronini Lynette T.
Utech Benjamin L.
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