Phase lock device and method

Details Phase lock device and method Phase lock device and method

1998-09-09

2001-09-18

Le, Amanda T. (Department: 2634)

Pulse or digital communications

Synchronizers

Synchronization failure prevention

C375S373000, C327S161000, C327S163000

Reexamination Certificate

active

06292521

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method and device applicable to a data transmission system, for dynamically adapting a data strobe to environments so that the phase (determined by some factors such as time delay, and influence of environment) of the data strobe is always proper for data receiver to read the data transmitted together with the data strobe from a data sender.
BACKGROUND OF THE INVENTION
Not being subject to the critical requirement for transmission speed, the conventional transmission systems were controlled simply according to clock pulses, and might take up to 10 ns for transmitting a piece of data, as can be seen from FIG.
1
.
With the growing demand for higher transmission speed, the feasibility to improve a conventional transmission system is seriously confined by the time delay problem inherent in the clock pulses of the system. As can be seen from
FIG. 2
in which a transmission system has its data sent out from a data sender according to clock pulses, there's a time delay such as 2-3 ns for the same clock pulse between the sender site and the receiver site, due to the delay inherent in the buffers of both sender and receiver (T
output buffer
), the transmission line (T
flight time
), and the clock skew (T
clock skew
). Total delay time=(T
output buffer
)+(T
flight time
)+(T
clock skew
). To assure correct receiving of data under the condition of the existence of the clock pulse delay, there's a need to extend the time period of holding data. With the clock pulse delay, another problem is the limit on the transmission speed of a transmission system due to the difficulty of increasing the frequency of the clock pulses.
Data Strobe is thus adopted to solve the above problem of clock pulse delay, for effectively promoting transmission speed. As shown in
FIG. 3
, Data Strobe have been used to function as clock pulses, and data signal is transmitted and received together with Data Strobe, in order to eliminate the effects of (T
output buffer
) and (T
flight time
), and to enable double data reading (DDR), so that the data can be read in response to both the rising and falling edges of the Data Strobe. Without taking into account the skew of Data Strobe, maximum transmission speed is limited only by the setup time and hold time of the flip-flops at both sender and receiver, and hence may approximate to 1 ns (setup time of 0.5 ns and hold time of 0.5 ns).
It is based on the synchronous transmission of both data signal and Data Strobe at the sender, that the Data Strobe is applied to communication industry. That's, the sender transmits both data signal and Data Strobe at the same time in response to the rising or falling edge of the clock pulse, so that (T
output buffer
) and (T
flight time
) can be balanced through the effect of the same delay trace, and the skew between data signal and Data Strobe can be minimized. The timing chart for sender is shown in FIG.
4
. Because the data signal must be read with the rising or falling of Data Strobe at receiver, there shall be proper delay for the edge of Data Strobe at receiver to assure reliable reading of data signal, as can be seen from FIG.
5
. Therefore a delay element must be installed at the receiver of the fundamental system shown in
FIG. 3
, to delay the Data Strobe at the receiver, as shown in FIG.
6
.
The design of the above delay element for delaying the Data Strobe at the receiver shown in
FIG. 6
is difficult, because an improper delay provided by the delay element may lead to incorrect reading of data at receiver. Now it can be realized that the reliable or correct reading of data at receiver depends on the proper delay period (D
ds−da
) between the data signal and the Data Strobe at the receiver, i.e., it depends on if the phase of Data Strobe at the receiver is within a stable margin in which the receiver can always be enabled to do correct reading of data.
The above delay period (D
ds−da
) may be determined by the following factors:
1. the skew (ps) inherent in the transmission of both the data signal and the Data Strobe sent from data sender to data receiver.
2. the delay (sd) arising from the operation of delay elements.
Obviously D
ds−da
=ps+sd. Among those affecting ps are the differences between output buffers, between PCB layouts, between receiver buffer threshold, between setup/hold time of flip-flops, and another factors. Among those affecting sd are delay element design, and influence of temperature, humidity, voltage, variation of frequency, or electromagnetic interference, and so on. Under the dynamic influence of various factors, the delay period is very unstable, possibly with a variation up to 0.5-1.8 ns for an example with system frequency of 66 Mhz. Further the variation is different for different system frequencies such as 66 Mhz, 75 Mhz, 83 Mhz, 100 Mhz, 133 Mhz, . . . . and so on. As system frequency gets higher, Clock pulse gets narrower, and the tolerable error margin of the skew for the system gets critically smaller. It has called significant attention to answer an question of how much the Data Strobe shall be delayed. Either too long or too short delay of the Data Strobe may lead to incorrect reading of data at receiver, or even system down.
Even an optimum delay has been calculated, the varying of ps and sd with temperature, voltage, frequency, electromagnetic interference, . . . , and so on may force the calculated optimum delay out of the best margin. This is why a conventional transmission system is often subject to the problem of data loss or system failure.
Now it is clearly the keys to the above problem are:
1. how to estimate the proper delay for the Data Strobe at receiver to assure the correct reading of data at receiver?
2. how to design delay elements in such a way that it can minimize the effect resulting from the variation of temperature, voltage, frequency, and the electromagnetic interference, . . . , and so on, in order to assure reliable reading of data, and system stability?
In spite of their relevant disclosures, the prior arts such as U.S. Pat. Nos. 5327103, 5161175, 5629897, 5343503 haven't suggested effective solutions.
SUMMARY OF THE INVENTION
Therefore the present invention is thus suggested to provide a method and device functioning as the above keys, whereby not only a target delay for Data Strobe can be forecast, but also an optimum delay can be achieved through dynamically adjusting the delay of the Data Strobe.
The objects of the present invention:
1. to achieve a high speed data transmission system with reliable and accurate data reading operation which can be immune from environmental influence.
2. to realize a phase locking by analyzing system clock to adapt reference clock (such as Data Strobe) to environmental influence.
3. to suggest an operation mode as a basis for DDR (double data reading).
4. to suggest a method, based on phase shifting, for accurate and reliable data reading at receiver.
5. to disclose a method for estimating an optimum delay of Data Strobe, and for automatically adapting the system to frequency variation, so that an optimum margin for reliable data reading operation can be realized.
An embodiment of the present invention may be characterized as follows: a delay element with adjustable delay period is set to delay the Data Strobe for a target delay value, several elements identical to the delay element are serially connected to delay the system clock for an auxiliary delay value, a monitoring device is configured to detect the variation of the auxiliary delay value which responds to varying environmental and operational conditions, and to calculate how to adjust (how much longer or how much shorter) these delay elements (the one for delaying Data Strobe and those for delaying system clock), keeping on the adjustment based on the detected variation of the auxiliary delay value will lead to that the delay period of the Data Strobe is always in such a margin that the data receiver is enabled to do data reading acc

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