Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate
Reexamination Certificate
1997-07-10
2001-09-18
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Thinning of semiconductor substrate
C438S425000, C438S445000
Reexamination Certificate
active
06291315
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor wafer and a semiconductor device manufacturing method with which it is possible to prevent to the utmost the occurrence of residues such as black silicon when forming a trench for isolation/separation or for capacitor formation in a semiconductor substrate such as a silicon substrate by dry etching process.
2. Description of the Related Art
Forming trenches for device separation in a semiconductor wafer, for example a silicon wafer, has been proposed in, for example, Japanese patent application laid-open No. H.5-109882. In forming a trench, an oxide film is formed on the wafer surface by a CVD method or the like, and an opening is formed in this oxide film by photolithography process over a trench formation region. That is, the oxide film is used as an etching mask. Silicon of the trench formation region exposed by the opening in the oxide film is then selectively etched by reactive ion etching (RIE) process or the like to form a trench of, for example, about 10 to 15 &mgr;m in depth.
SUMMARY OF THE INVENTION
However, in conventional trench etching there has been the problem that there is considerable contamination due to particles. When the cause of this contamination was investigated it was found to originate in that at the time of trench etching a region where silicon is widely exposed appears at a periphery of the wafer and so-called black silicon as shown schematically in
FIG. 13A
is formed at this periphery. This will now be explained in more detail.
In
FIG. 13A
a silicon wafer to undergo trench etching is one having a so-called bonded SOI (Silicon On Insulator) structure, wherein two silicon wafers
1
A,
1
B are bonded together with an embedded oxide film
1
C therebetween. After an oxide film
2
is formed as a mask material for trench etching on the main surface
1
a
of this silicon wafer
1
, an opening for trench formation
2
a
is formed in the oxide film
2
. By carrying out reactive ion etching process with the oxide film having the opening
2
a
formed therein as a mask, the exposed silicon is selectively etched to form a trench
3
. When at the time of this trench etching there is a part
5
where silicon is widely exposed at the periphery of the wafer
1
, black silicon
6
tends to be formed there. During subsequent processes (for example cleaning step), projecting portions of this black silicon
6
break off and become particles. It has been found that this black silicon
6
is also liable to appear in regions where the width of the trench
3
is large, as shown in the figures by the reference numeral
4
.
The problem of black silicon
6
tending to be formed during trench etching is not limited to bonded SOI wafers as shown in
FIG. 13A
, and black silicon is also formed when a trench for device separation or a trench for capacitor formation (trench capacitor structure) is formed in a bare silicon wafer, as shown in FIG.
13
B.
When black silicon
6
is formed on a silicon wafer
1
and produces particles as described above it becomes a cause of electrical insulation defects, and as a result it also has an adverse affect on manufacturing yield.
One cause of a large-area exposed silicon region
5
appearing at the periphery of the semiconductor wafer surface during trench etching is the photolithography process carried out in the process of forming the opening for trench formation
2
a
in the oxide film
2
serving as the mask material of the trench etching process.
Photolithography process consists of the steps of resist coating, exposing, developing, and etching. Among these, in resist coating, a resist material
7
such as photoresist is dripped and coated onto the silicon wafer
1
while the silicon wafer
1
is rotated at high speed by a spin coater or the like. Consequently, there arises a phenomenon in which some resist material
7
having reached the edge of the silicon wafer
1
under centrifugal force passes around from the periphery of the silicon wafer
1
to its rear side (see FIG.
14
A). When resist material
7
has been coated on the periphery of the silicon wafer
1
this results in the production of particles when the wafer edge makes contact with positioning parts and the like in subsequent steps and, in other apparatus such as an exposer the occurrence of these particles causes reduction in exposure resolution, and therefore, it is necessary to remove these particles by some means.
Generally, to remove resist material
7
passing around to the edge of the silicon wafer
1
, side rinsing (or edge bead removing), wherein a solvent is applied to the resist on the periphery during resist coating, has been carried out. In this process, with the silicon wafer
1
rotating, while the resist material
7
is coated by being dripped from the vicinity of the center of rotation of the silicon wafer
1
, resist material
7
coated onto the periphery of the silicon wafer
1
is removed by a rinsing agent being dripped onto the periphery of the wafer (see
FIGS. 14B
,
14
C). As a result of this the resist material
7
having passed around to the rear side is also peeled off at the same time, and consequently it is possible to avoid the problem described above. There are also such methods as backside rinsing, wherein similarly during resist coating or immediately after resist coating a rinsing liquid is applied to the rear side of the wafer to remove resist adhering to the rear side, and peripheral exposure (optical edge bead removing), wherein the wafer periphery is selectively exposed and resist on the periphery is removed during developing, but these are both for preventing particle formation originating in resist chipping at the periphery.
Therefore, in the photolithography process carried out when forming the opening
2
a
in the oxide film
2
for use as a mask during trench etching, the oxide film
2
at the periphery of the silicon wafer
1
from which the resist material
7
was removed by the above-mentioned side rinsing is also removed by the etching. As a result, during the trench etching, a region where the silicon is widely exposed appears at the periphery of the silicon wafer
1
and the above-mentioned black silicon is formed.
It is therefore an object of the present invention to provide a semiconductor wafer and a semiconductor device manufacturing method with which it is possible to prevent the formation of black silicon in the trench etching process even in a case where side rinsing is carried out before the forming of the opening for trench formation in the mask material for trench etching.
To solve the problem described above, in the present invention, in a semiconductor wafer in which a trench is formed by dry etching, semiconductor regions other than a trench formation region is prevented from exposing during trench etching.
More specifically, an oxide film of a film thickness thicker than a film thickness of an oxide film etched by dry etching to form a trench (deep groove or deep hole) in a chip formation region of a semiconductor wafer is formed in a peripheral region of the semiconductor wafer before the dry etching is carried out.
That is, because a thick oxide film is formed in the peripheral region of the semiconductor wafer in advance, this thick oxide film functions as an insulating film for etching prevention when the trench (deep groove or deep hole) is being formed. Therefore, even in a case where side rinsing is carried out when the opening for forming the trench in the mask material (oxide film) for trench etching is formed, in the main surface of the semiconductor wafer there are no parts where a semiconductor region is exposed except the opening for trench formation in the insulating film for mask use formed in the chip formation region. Also, even if the thick oxide film disposed at the periphery of the wafer is exposed at the wafer surface by the above-mentioned side rinsing, because its film thickness is set thicker than the oxide film thickness that can be etched in the trench etching, in the peripheral regio
Miura Shoji
Nakayama Yoshiaki
Chaudhuri Olik
Denso Corporation
Duy Mai Anh
Pillsbury & Winthrop LLP
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