Stock material or miscellaneous articles – All metal or with adjacent metals – Composite; i.e. – plural – adjacent – spatially distinct metal...
Reissue Patent
1999-02-19
2001-01-30
Kastler, Scott (Department: 1742)
Stock material or miscellaneous articles
All metal or with adjacent metals
Composite; i.e., plural, adjacent, spatially distinct metal...
C428S651000
Reissue Patent
active
RE037032
ABSTRACT:
This invention is directed to the field of semiconductor devices, and more particularly to films useful in interconnects in integrated circuits.
With advances in integrated circuit technology, device dimensions are being scaled down and concurrently the chip size and complexity are continually increasing. Since the smaller size of devices makes them faster, circuit performance should improve. However, the higher complexity and larger chip size require closely spaced, long interconnecting lines. As a result, the RC time delay, the IR voltage drop, the power consumption and cross-talk noise associated with the interconnection lines can become appreciable. Thus, even with very fast devices, the overall performance of a large circuit can be seriously affected by the limitations of the interconnections.
To accommodate the needs of future VLSI technology, new materials must be investigated for use in fabricating multilevel interconnections. In this application, the term, “level” will be used to describe conductors which are separated by an insulator; the term, “layer” will be used to describe different conductors together at one level of interconnection.
For a long time, aluminum has been used to form the metal in interconnections; however, as device dimensions are scaled down, the current density increases, resulting in a decrease in reliability. Some of the problems with pure aluminum are electromigration, high solubility and diffusivity of silicon leading to poor contract reliability to shallow junctions, and hillock formation causing electrical shorts between successive levels of aluminum. Such hillock formation is an especially notable problem in multilevel interconnection films, causing shorts between levels.
However, aluminum is preferred over most other metals for interconnection structures because of its low resistivity and silicon compatibility. Tungsten has been used for interconnections, and it has been urged that the resistance of CVD tungsten can be as good as deposited aluminum when step coveraged is considered. However, various planarization processes can be used to overcome the increased resistances associated with thickness reduction and steps. Aluminum-copper is sometimes used to solve problems characteristic of pure aluminum. However, it is known that it is difficult to dry etch this combination; the combination corrodes easily; and, hillocks are not completely eliminated. In addition, it has been found that copper rapidly diffuses through SiO
2
degrading underlying device characteristics.
Studies have been done on the problem of hillock formation due to electrical and/or thermal stress. Hillocks form in part because of large differences between the thermal expansion coefficients of Al and Si. One known method of reducing these hillocks is to deposit a film beneath the Al which has an expansion coefficient between that of Al and Si. This is usually done with silicides such as WSi
2
or MoSi
2
. It was also tried with a Ti-W alloy as the bottom layer, but with no noticeable improvement in hillock density, although an increase in electromigration lifetime has been reported.
It is an objective of the present invention to provide an improved film for use in providing interconnections in an integrated circuit.
It is a further objective of the present invention to provide an improved film incorporating aluminum for use as an interconnection level in multilevel interconnection structures used ion integrated circuits.
It is another objective of the present invention to provide a multilayer interconnection film incorporating aluminum which has reduced hillocks in order to minimize breakdown in multilevel interconnection or capacitor structures in integrated circuits.
Another objective is to provide a structure which is dry etchable, to facilitate processing.
Yet another objective is to provide smooth conductive films having reduced electrical resistivity.
These and other objectives of the present invention are achieved by fabricating a film for a VLSI interconnection incorporating Al-Si which may be alternatively layered with refractory metals at each interconnection level or which may incorporate a refractory metal in a homogeneous level for a multilevel interconnection structure. It has been found that titanium (Ti) is especially useful in forming such structures; tungsten was also tested with some limited success. It is speculated that Zr, Hf, V
2
and Ta will also prove to be satisfactory.
It has further been found that a sputtering technique is especially useful in laying down such films. The success of this technique has baffled many prior researchers in this field. Prior researchers have tried to alloy aluminum with metals such as titanium and have found that the resulting film have very high resistivity, making it unsuitable. This research has demonstrated that aluminum, silicon and titanium together resulted in useful films. The key features of this invention include the addition of both silicon and titanium to aluminum to provide the film, and the discovery that such a film may be laid down either as a homogeneous film or as a layered film comprising alternate layers of aluminum-silicon and the refractory metals such as titanium. The invention will be better understood with respect to the following figures wherein:
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R.W. Bower, Appl.Phys.Letters, vol. 23, No. 2 p. 99-101, Jul. 15, 1973.
Vance Hoffman, Solid State Techn. pp. 57-66, Dec. 1976.
P. S. McLeod et al, J. Vac. Sci. Techn, vol. 14, No. 1 pp. 263-265, Jan./Feb. 1977.
Barbee, Jr. Troy W.
Gardner Donald S.
Saraswat Krishna C.
Kastler Scott
The Board of Trustees of the Leland Stanford Jr. University
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