Motion vector processing circuit

Details Motion vector processing circuit Motion vector processing circuit

1993-10-22

2001-03-06

Le, Vu (Department: 2713)

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

C348S699000

Reexamination Certificate

active

06198771

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a processing circuit advantageously employed for detection and processing of a motion vector employed for picture compression and encoding in digital picture processing. More particularly, it relates to a processing circuit for detecting the motion vector by carrying out a full search by a block-matching method.
2. Description of Related Art
Among the methods previously employed for picture compression and encoding in processing digital picture signals, are the so-called block-matching method and the gradient method.
The block-matching method, extensively applied for motion compensation and prediction in compression and encoding of picture signals, is hereinafter explained.
First of all, a picture frame or field is divided into blocks, each usually having a block size of 8×8 or 16×16 pixels. Motion vector detection is the process of detecting the area of a previous frame from which an object block or reference block of a current frame has been moved. Specifically, motion vector detection is the operation of detecting a block bearing the strongest resemblance to the reference block Bp of the current frame Fp from a set of candidate blocks Bb within a search range E of the previous frame Fb and detecting a positional shift between the reference block Bp and the detected candidate block Bb as a motion vector, as shown for example in FIG.
1
.
During motion vector detection, the block bearing the strongest resemblance to the reference block Bp is detected in the following manner.
As a first step, the difference between each pixel value of a given candidate block Bb and the corresponding pixel value of the reference block Bp is determined to create an evaluation value represented by the difference, for example, a sum of absolute values of the differences or a sum of the differences squared.
As a second step, the first step is performed for each of the candidate blocks Bb within the search range E and the one representing the least of the sums of the absolute values of the differences or the least of the sums of the differences squared is found. The candidate block Bb which gives the least value of the sums of the absolute values of the differences or the least of the sums of the differences squared is adopted as the block bearing the strongest resemblance to the reference block Bp.
Specifically, if the block size of the reference block Bp is M×N pixels, and the number of the candidate blocks Bb is K×L, the above-depicted motion vector detecting operation may be represented by the following equations (1) and (2):
D
i
,
j
=
∑
m
=
0
M
-
1
⁢
∑
n
=
0
N
-
1
⁢
&LeftBracketingBar;
r
m
,
n
-
c
m
+
1
,
n
+
j
&RightBracketingBar;
⁢
 
⁢
0
≤
i
<
K
,
 
⁢
0
≤
j
<
L
(
1
)
 MV
x,y
=minD
i,j
  (2)
It is noted that the sum of the absolute value of the differences D
i,j
is found using the equation (1); not the sum of differences squared. In the equation (1), r and c represent the pixel value of the reference block Bp of the current frame, and previous frame, respectively.
Further, it is noted that (x, y) in the equation (2) mean the values of (i, j) which give the least sum of the absolute values of the differences (minD
i,j
). It is (x, y) in the equation (2) which represents the motion vector MV
x,y
.
Consequently, in the above-depicted example of
FIG. 1
in which the sum of the absolute values of the differences D
5,3
has the least sum value for the block size of the reference block Bp of 4×4 pixels and the number of the candidate blocks Bb of 7×7, the motion vector is given as (5, 3).
The conventional circuit arrangement for the above-mentioned motion vector detection will be hereinafter explained. First, by way of explaining the conventional circuit arrangement, an example of the operation of detecting the motion vector is explained. The conventional circuit arrangement and control system for this example will then be explained.
By way of an example, the operation of detecting the motion vector for the block size of the reference block Bp of 3×4 pixels and the number of the candidate blocks Bb of 3×4 is explained with reference to FIG.
2
. In
FIG. 2
, the lowercase letters a, b, c . . . are affixed as subscripts to the pixel values r of the reference block Bp of the current frame Fp (r
a
, r
b
, r
c
, . . . ), while numerals 0, 1, 2, . . . are affixed as subscripts to the pixel values c of the previous frame Fb (c
0
, c
1
, c
2
, . . . ). The sequence of operations for detecting the motion vector is hereinafter explained with reference to FIG.
2
.
As a first step, calculation of the following equations (3) to (14) is performed:
D
0,0
=|r
a
−c
0
|+|r
b
−c
1
|+|r
c
−c
2
|+|r
d
−c
3
|+|r
e
−c
7
|+ . . . +|r
1
−c
17
|  (3)
D
0,1
=|r
a
−c
1
|+|r
b
−c
2
|+|r
c
−c
3
|+|r
d
−c
4
|+|r
e
−c
8
|+ . . . +|r
1
−c
18
|  (4)
D
0,2
=|r
a
−c
2
|+|r
b
−c
3
|+|r
c
−c
4
|+|r
d
−c
5
|+|r
e
−c
9
|+ . . . +|r
1
−c
19
|  (5)
D
0,3
=|r
a
−c
3
|+|r
b
−c
4
|+|r
c
−c
5
|+|r
d
−c
6
|+|r
e
−c
10
|+ . . . +|r
1
−c
20
|  (6)
D
1,0
=|r
a
−c
7
|+|r
b
−c
8
|+|r
c
−c
9
|+|r
d
−c
10
|+|r
e
−c
14
|+ . . . +|r
1
−c
24
|  (7)
D
1,1
=|r
a
−c
8
|+|r
b
−c
9
|+|r
c
−c
10
|+|r
d
−c
11
|+|r
e
−c
15
|+ . . . +|r
1
−c
25
|  (8)
D
1,2
=|r
a
−c
9
|+|r
b
−c
10
|+|r
c
−c
11
|+|r
d
−c
12
|+|r
e
−c
16
|+ . . . +|r
1
−c
26
|  (9)
D
1,3
=|r
a
−c
10
|+|r
b
−c
11
|+|r
c
−c
12
|+|r
d
−c
13
|+|r
e
−c
17
|+ . . . +|r
1
−c
27
|  (10)
D
2,0
=|r
a
−c
14
|+|r
b
−c
15
|+|r
c
−c
16
|+|r
d
−c
17
|+|r
e
−c
21
|+ . . . +|r
1
−c
31
|  (11)
 D
2,1
=|r
a
−c
15
|+|r
b
−c
16
|+|r
c
−c
17
|+|r
d
−c
18
|+|r
e
−c
22
|+ . . . +|r
1
−c
32
|  (12)
D
2,2
=|r
a
−c
16
|+|r
b
−c
17
|+|r
c
−c
18
|+|r
d
−c
19
|+|r
e
−c
23
|+ . . . +|r
1
−c
33
|  (13)
D
2,3
=|r
a
−c
17
|+|r
b
−c
18
|+|r
c
−c
19
|+|r
d
−c
20
|+|r
e
−c
24
|+ . . . +|r
1
−c
34
|  (14)
In performing these calculations, the pixel values r (r
a
-r
1
) of the reference block BpO and pixel values c (c
0
-C
34
) of all candidate blocks (12 candidate bloc

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