Disk drive testing

Details Disk drive testing Disk drive testing

1998-10-20

2001-08-28

Hoff, Marc S. (Department: 2857)

Data processing: measuring, calibrating, or testing

Testing system

Of circuit

C702S185000, C702S186000, C360S003000, C360S053000

Reexamination Certificate

active

06282501

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention is related to the field of disk drive systems, and in particular, to a drive control integrated circuit that performs robust testing on the disk drive without host computer input.
2. Statement of the Problem
Host computers store data on disk drives. The disk drive industry is extremely competitive, so the cost and reliability of disk drives are critically important to industry success. Robust testing is required to ensure the reliability of a disk drive.
Unfortunately, robust testing also increases the cost of the disk drive.
A disk drive operates in response to commands from a host computer. Past testing methods have emulated these host commands to simulate field conditions in a robust manner. Unfortunately, expensive test systems and labor were required to interconnect the disk drives with the test systems and perform the tests.
To avoid the cost of these test systems and labor, internal test software was developed for the disk drive. The test software was loaded into the disk drive and executed by a drive control integrated circuit. The internal software partially emulated field conditions, but did not simulate inputs to the host interface of the disk drive. Thus, the host interface and host interface processing were not tested.
SUMMARY OF THE SOLUTION
The invention solves the above problem with a method and integrated circuit for testing a disk drive. The invention internally generates and provides test commands to the host interface in the disk drive. The test inputs emulate the actual commands that a host computer would provide to the host interface. Thus, the invention provides robust testing without complex and expensive test equipment and labor.
One version of the invention includes a drive control integrated circuit. The drive control integrated circuit comprises: a host interface, a processor, a buffer control, and compare circuitry. The processor senses a test mode and initiates a test pointer. The buffer control transfers test commands to the host interface based on the test pointer. The processor controls a write operation and a read operation in response to the commands in the host interface. The compare circuitry compares the data block from the write operation with the data block from the read operation and generates an alarm if the data blocks do not match.


REFERENCES:
patent: 5953689 (1999-09-01), Hale et al.
patent: 5978752 (1999-11-01), Morris
patent: 5987400 (1999-11-01), Hirano

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