Analog delay line implemented with a digital delay line...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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Details

C327S271000, C327S284000

Reexamination Certificate

active

06218880

ABSTRACT:

TECHNICAL FIELD
The present invention relates to signal processing and, more particularly, to a circuit and methodology for delaying an analog signal.
BACKGROUND ART
There are many situations in which it is desirable to delay an analog electrical signal for a prespecified period of time. For example, delaying analog signals is common in processing audio signals, such as music. Conventional techniques of delaying analog signals, however, have a number of drawbacks.
Some conventional analog delay lines involve large-lumped components, such as large capacitors, resistors, and inductors, that are difficult to manufacture on a monolithic semiconductor substrate. Moreover, some conventional analog delay lines may not be able to accurately achieve small delay periods, e.g. around 1 ns. A related difficulty with conventional analog delay lines is in obtaining fine resolution within the delay periods, for example, about 200 ps.
DISCLOSURE OF THE INVENTION
There exists a need for an analog delay line that can readily be implemented on a monolithic semiconductor substrate. There is also a need for an analog delay line which can accurately achieve small delay periods and fine resolution within the delay periods.
These and other needs are met by the present invention, in which an analog-to-digital (A/D) converter converts an analog signal into a plurality of digital signals. The digital signals are delayed by digital delay lines and reconverted into a delayed analog signal. By converting the analog signal into a digital signal, the analog delay line can delay the analog signal by digital delay techniques, and the analog delay line can readily be implemented on a monolithic semiconductor substrate and achieve small delay periods with fine resolution.
According to one aspect of the invention, an analog delay line comprises an analog-to-digital converter, having an analog signal input and a plurality of digital signal outputs. A plurality of digital delay lines are coupled respectively to the digital signal outputs, in which each digital delay line includes a plurality of digital delay elements coupled in series. A digital-to-analog converter, having an analog signal output, has a plurality of digital signal inputs coupled respectively to outputs of the digital delay lines. Preferably, the digital delay lines and digital delay elements include an input for receiving a calibration signal for adjusting the delay period, for example, to be about 140 ps.
According to another aspect of the invention, a method of delaying an analog signal includes the step of converting the analog signal into a plurality of digital signals. The method includes repeatedly delaying by a common delay period the plurality of digital signals and converting the plurality of repeatedly delayed digital signals into a delay analog signal. The method may include the step of calibrating the common delay period to be about 140 ps.
Additional objects, advantages, and novel features of the present invention will be set forth in part in the detailed description which follows, and in part will become apparent upon examination or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.


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