Semiconductor integrated circuit, operating state detector,...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S540000

Reexamination Certificate

active

06285248

ABSTRACT:

TECHNICAL FIELD
The present invention relates to an improvement in a semiconductor integrated circuit and electronic equipment using the same, comprising a constant voltage generation section that increases or decreases a power voltage supplied from an external power source to generate a constant voltage, and a function block that uses the constant voltage generated from the constant voltage generation section as a power source.
BACKGROUND OF ART
An example of this type of semiconductor integrated circuit is shown in FIG.
11
. In
FIG. 11
, a reference power voltage
2
obtained from an external power source
1
is supplied to a constant voltage generation device
3
. The constant voltage generation device
3
generates a fixed constant voltage
4
, based on the reference power voltage
2
, and supplies it as a power voltage to first and second function blocks
6
A and
6
B. The first and second function blocks
6
A and
6
B convert any input signals
5
A and
5
B based on corresponding specific functions, to generated output signals
7
A and
7
B having specific functions. When the first and second function blocks
6
A and
6
B are in a standby state, the operation of the corresponding first and second function blocks
6
A and
6
B is halted and the current supplied from the output constant voltage
4
is reduced by suppressing the signals
5
A and
5
B by function stop signals
8
A and
8
B.
With a conventional semiconductor integrated circuit, the constant voltage
4
is necessary for enabling response at the highest operating speed for all operating states for converting any input signals
5
A and
5
B to specific functions.
However, when the constant voltage
4
is supplied at the highest operating speed in all of the operating states of the first and second function blocks
6
A and
6
B, even if it is necessary for one function block
5
A to operate at the highest speed, it could happen that such an operating speed is not required for the other function block
5
B. As a case in which the difference between the highest operating speed and the lowest operating speed in operation is extremely large, it is possible to consider that a data access circuit and a frequency converter are used in common within the semiconductor integrated circuit.
If prior-art techniques are used, a high power voltage corresponding to the highest response speed will be necessary for one function block
6
A in such a case, and it is not possible to control the power consumption.
With prior-art techniques, although it is possible to reduce the operating current on standby, a large amount of operating current is consumed during operation when the semiconductor integrated circuit contains at least two circuits having different operating speed respectively and there is an extremely large difference between the highest operating speed and the lowest operating speed while in the operating state, because the power voltage while in the operating state is supplied as a voltage level at a signal response that is enabled by the highest operating speed of the function blocks. It is therefore difficult to guarantee the circuit response speed at both the highest operating speed and the lowest operating speed necessary for the function blocks, while simultaneously implementing a reduction in power current.
The MOS transistors that configure the plurality of function blocks often have different threshold voltages, due to unevenness in the semiconductor wafer surface during the manufacturing process. This raises a technical problem in that the frequency response speeds will be different for each function block, even if the same power voltage is supplied to all of the function blocks operating at the same speed.
An objective of the present invention is to provide a semiconductor integrated circuit and electronic equipment using the same which solve the previously described technical problems and make it possible to reduce the operating current flowing during operation and thus reduce the power consumption, even if there are at least two circuits, which have different operating speed respectively, coexisting within the semiconductor integrated circuit, and the difference between the highest operating speed and the lowest operating speed is extremely large.
Another objective of the present invention is to provide a semiconductor integrated circuit and electronic equipment using the same which make it possible to reduce variations in the frequency response speeds of a plurality of function blocks, even when the manufacturing process has created differences in the threshold voltages of MOS transistors configuring those function blocks and the same power voltage is supplied to the function blocks operating at the same operating speed.
DISCLOSURE OF INVENTION
A semiconductor integrated circuit in accordance with the present invention comprises:
at least one constant voltage generation section for increasing or decreasing a power voltage supplied from at least one external power source, based on a basic voltage, to generate at least one constant voltage;
at least one function block to which is supplied the at least one constant voltage generated by the at least one constant voltage generation section;
at least one operating state detection section for generating a second signal indicating an operating state of the at least one function block, based on a first signal including operating speed information of the at least one function block;
at least one operating state encoding section for encoding an operating state of the function block to generate operating state data, based on the second signal; and
at least one voltage output control section for modifying the basic voltage of the at least one constant voltage generation section, based on the operating state data.
The semiconductor integrated circuit of this aspect of the invention makes it possible to obtain the optimal power voltage necessary for the operation of the function blocks, based on the generation of a second signal indicating the operating state of these function blocks, which in turn is based on a first signal comprising operating speed information (the actual operating frequency) of each function block. The semiconductor integrated circuit of the present invention also makes it possible to implement the supply of the optimal power voltage corresponding to the operating speed of each function block, even when the threshold voltages of the MOS transistors thereof vary from the design values during the manufacturing process.
This aspect of the invention makes it possible to achieve the effect of reducing the power consumption by setting power voltages that are optimized for the operation of each of the function blocks from a signal period in which rapid operation is necessary to a signal period in which the response during low-speed operation is sufficient.
With this aspect of the present invention, an operating-setting signal is preferably input to each function block, and that function block supplies the first signal to the at least one operating state detection section when the operating-setting signal is active.
In such a case, the operating-setting signal could be set in such a manner that it becomes active at timings on the time axis that differ for each of the plurality of function blocks.
This means that one each of the at least one operating state detection section, at least one operating state encoding section, at least one voltage output control section, and at least one constant voltage generation section can be used in common for the plurality of function blocks.
With this aspect of the present invention, the voltage output control section may comprise a digital-analog converter for performing a digital-to-analog conversion on the operating state data; and a sample-and-hold circuit for sampling an output of the digital-analog converter based on the operating-setting signal, and generating the basic voltage. This configuration makes it possible to continue to hold a proper basic voltage for each function block, to ensure the optimal constant vol

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