Technique for minimizing decision feedback equalizer...

Pulse or digital communications – Equalizers – Automatic

Reexamination Certificate

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Details

C375S346000

Reexamination Certificate

active

06226323

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to systems for, and methods of, recovering digitally modulated television signals and, more particularly, to a dual mode QAM/VSB receiver system for recovering quadrature amplitude modulated or vestigial sideband modulated signals.
BACKGROUND OF THE INVENTION
Modern digital telecommunication systems are operating at ever-increasing data rates to accommodate society's growing demands for information exchange. However, increasing the data rates, while at the same time accommodating the fixed bandwidths allocated by the Federal Communications Commission (FCC), requires increasingly sophisticated signal processing techniques. Since low cost, small size and low power consumption are portent in the hardware implementations of such communication systems, custom integrated circuit solutions are important to achieving these goals.
Next generation digital television systems, such as cable transported television (CATV) and high-definition television (HDTV) rely on telecommunication transceivers to deliver data at rates in excess of 30 megabits per second (30 Mb/s). The ATSC A/53 Digital Television Standard, was developed by the “Digital HDTV Alliance” of U.S. television vendors, and has been accepted as the standard for terrestrial transmission of SDTV and HDTV signals in the United States. The ATSC A/53 standard is based on an 8-level vestigal sideband (8-VSB) modulation format with a nominal payload data rate of 19.4 Mbps in a 6 MHz channel. A high data rate mode, for use in a cable television environment, is also specified by the standard. This particular mode, defined in Annex D to the ITU-T J.83 specification, utilizes a 16-VSB modulation format to provide a data rate of 38.8 Mbps in a 6 MHz channel.
Transmission modes defined in ITU-T J.83 Annex A/C are used primarily outside the United States for digital cable television transmission. The transmission modes supported by this specification have been adopted in Europe as the Digital Video Broadcast for Cable (DVB-C) standard, and further adopted by the Digital Audio-Video Council (DAVIC) with extensions to support 256-QAM modulation formats.
Beyond these divergent requirements, the ITU-T J.83 Annex B standards define the dominant methodology for digital television delivery over CATV networks in the United States. It has been adopted as the physical layer standard by various organizations including the SCTE DVS-031, MCNS-DOCSIS and the IEEE 802.14 committee.
Given the implementation of multiple modulation techniques in the various adopted standards, there exists a need for a television receiver system capable of receiving and demodulating television signal information content that has been modulated and transmitted in accordance with a variety of modulation formats. In particular, such a system should be able to accommodate receipt and demodulation of at least 8 and 16-VSB modulated signals in order to support US HDTV applications, as well as 64 and 256-QAM modulated signals, for European and potential US CATV implementations.
SUMMARY OF THE INVENTION
The present invention is directed to digital data communication systems and methods for operating such systems in a manner that reduces their complexity and computational intensity. Specifically, the invention is directed to reducing the input wordlength of a decision feedback filter, thereby linearly reducing the complexity of a decision feedback equalizer.
In a first aspect of the invention, an integrated circuit digital communication system includes a decision feedback equalizer, capable of operating on 256-QAM symbols. 256-QAM symbols require 8-bits for representation of the symbols at the input to a decision feedback filter. These are further divided into 4-bits representing real symbols and 4-bits representing imaginary symbols. Utilizing a two's compliment numbering system for implementing signal processing functions results in a −½ bit offset in the representation of the QAM symbols.
An integrated circuit receiver includes an adaptive decision feedback equalizer which comprises a feedforward filter, a decision circuit and a decision feedback filter, coupled in parallel fashion with the decision circuit. An offset generation circuit provides an offset signal which is summed with the output signal from the decision feedback filter. The offset signal corresponds to a bitwise representation of a fixed DC offset component resulting from two's compliment representation of a symbol.
In a particular aspect of the invention, each symbol might be represented with a 4-bit representation in two's compliment. This results in a representation which is incorrect by a fixed offset equal to −{fraction (1/16)}, which can be corrected by adding a fifth bit to each symbol's representation. A decision feedback filter is constructed to receive a symbol decision from a slicer, for example, having a wordlength of 4-bits, the decision feedback filter outputting a compensated symbol decision having a wordlength of 4-bits. An offset generation circuit generates a DC value corresponding to the fifth bit representation, and a summing circuit combines the decision feedback filter output with the DC value generated by the offset generation circuit. The decision feedback filter convolves a 4-bit wordlength symbol decision with adaptively developed coefficients, while the offset generation circuit convolves the DC value with a set of filter coefficients received from the decision feedback filter. The summing circuit, thus provides a full ISI compensation signal corresponding to a full 5-bit symbol representation.
In a further aspect of the invention, in the case where the receiver receives VSB transmissions utilizing a pilot tone as a carrier reference, the DC component representing the pilot tone is further convolved with a set of coefficients received from the decision feedback filter, in order to develop a compensation signal representing a previously extracted DC component.
In accordance with practice of the invention, a method for adaptively equalizing symbols, expressed as digital words, might be characterized as identifying a nibble component of the word, where the nibble component represents a particular fixed offset value. The word is truncated to a vestigal representation which excludes the nibble component. The vestigal representation is convolved with coefficient tap value in a decision feedback filter while the fixed offset value, corresponding to the excluded nibble component, is convolved with the same coefficient tap values in a correction filter. The complexity of circuitry used to implement the decision feedback filter is thereby linearly reduced, with a corresponding minimal increase in integrated circuit hardware represented by the correction filter.


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