Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Reexamination Certificate
1996-09-06
2001-04-03
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Ball or nail head type contact, lead, or bond
C257S734000, C257S779000, C438S360000
Reexamination Certificate
active
06211571
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to a method for testing a substrate which is provided with a wiring structure, in particular, a chip in accordance with the introductory clause of Claim 1, a solder deposit carrier in accordance with the introductory clause of Claim 11 which can be used with this method, and a solder deposit in accordance with the introductory clause of Claim 19, which can be used on the solder-deposit carrier.
2. Discussion of the Related Art
The manufacture of an IC that is assembly-ready, such as is used in electronic devices for EDP for example, is divided into a large number of manufacturing steps from a wafer to an encased, assembly-ready chip.
Apart from the costs that are caused by the manufacturing of the wafer, the costs for the manufacturing of an assembly-ready, packaged chip are primarily caused by the subsequent manufacturing steps. These steps are primarily the creation of so-called bumps on the bond pads of the chips, which are created from the wafer by singling them out, and the expensive packaging of the chips. As a rule, for the quality control of the chips, an electrical check of the chip's strip conductors is carried out after the chip has been encased. Many times, however, the causes for the malfunctioning of a chip have their base in one of the manufacturing steps which precede the packaging of the chip, so that faulty chips which represent rejects even before the encasing, are packaged unnecessarily. As a result, the costs associated with what will be a reject in any case are increased even further.
Even in the so-called “flip-chip technology” in which chips are bonded directly to a substrate by means of increased contact metallization applied to the chip bond pads, a quality control check of the chips, or even of the complete wafers that are used in the flip-chip process, is not carried out until after the production of the connection. Overall, the processing of chips or complete wafers by means of the flip-chip method leads to complex structures which do not allow for the complete testability of individual chips or complete wafers under defined test conditions, such as are prescribed for a burn-in test, for example, without risk to the entire structure when using known test methods.
While it is indeed known in the art to check individual chips or even complete wafers with appropriate test devices before carrying out a subsequent connecting technique, a quality check of such a type can only be carried out, however, with exceptional effort, which is in addition to the carrying out of the connecting technique which is already complex in itself.
SUMMARY OF THE INVENTION
The present invention therefore performs the task of suggesting a method and an apparatus by means of which it is possible to carry out a quality control check in a cost-effective way even before the manufacturing stage of the packaging of the chip and before the carrying out of the connecting technique.
This task is carried out by means of a method with the characterizing features of Claim 1 and an apparatus with the characterizing features of Claims 11 and 19.
With the method in accordance with the invention, by means of a solder-deposit carrier which is provided with a structured, electrically conductive coating with bond pads for the arranging of solder deposits and their transfer to appropriately placed bond pads of a substrate, an electrical check of the wiring structure of the substrate is carried out during the transfer of the solder deposits.
In this way, the substrate, which can, for example, be configured as a printed circuit board with a more or less complex wiring structure or as a chip, can be tested with respect to its proper functioning by means of an individual contacting of its bond pads by the solder-deposit carrier.
As a result, it becomes clear that the electrical testing of the wiring structure of the substrate during its manufacturing process is not linked with an additional processing step. Rather, as a result of the method in accordance with the invention, an almost inherent quality test is made possible during a manufacturing step which is necessary in any case. In addition, the electrical checking of the wiring structure of the substrate takes place before its completion by means of a final encasing, or before the production of a final contacting in the flip-chip method, so that the further processing of substrates with defective wiring structures is avoided.
If before the placement of the solder deposits on the structured, electrically-conductive coating, a transfer mask with mask openings which leave the bond pads free is brought onto the coating, methods other than an application of pellets of solder material can be used for the forming of the solder deposits on the solder-deposit carrier. Along with a chemical deposition of solder material for forming the solder deposits in the mask openings, a galvanic deposition of solder material for the forming of solder deposits on the bond pads is well-suited in a special way because of the electrically conductive coating which is needed in any case for the carrying out of the test. In conjunction with this, the form of the solder deposits is in essence determined by the shape of the mask openings. In addition, it is also possible to apply the solder material in the form of solder paste.
An especially sure contact between the solder-deposit carrier that is being used as the test contact arrangement and the bond pads of the substrate is provided if, after the production of a physical contact between the solder deposit of the solder-deposit carrier and the bond pads of the substrate, at least a partial fusing of the solder deposit takes place for the production of a solder interconnection between the solder-deposit carrier and the substrate. This solder interconnection can be brought about by means of a wetting of the bond pads of the substrate, that is, more or less by means of a conforming, positive interlocking between the solder deposits and the bond pads, or, depending on the subsequent solidification of the solder deposits, as a continuous material interconnection between the solder deposits and the bond pads. In each case, the solder interconnection ensures a good contact during the electrical testing of the wiring structure of the substrate with the smallest possible contact resistance.
If, when there is a partial fusing of the solder deposits, there first takes place a fusing of a contact part which is placed adjacent to the bond pad of the substrate, and subsequently a fusing of a base part that borders the contact part, the possibility exists of carrying out the fusing that is necessary for the transfer of the solder deposit in two stages, namely, a contact melting and a transfer melting, which are characterized by differing temperatures, in order to be able in this way to select, independently of the solder material composition of the base part, a solder material composition of the contact part that is designed, with respect to its melting point, for the test temperature that is prescribed for the test.
Forming the basis for the preceding process methodology is the idea of being able to establish the positive-interlocking solder connection, which is especially advantageous for the carrying out of the test and which is characterized by the smallest possible contact resistance, independently of the material composition of the base part, which in essence determines the electrical characteristics of the solder deposit.
Particularly from the energetic standpoint, it is especially advantageous if, during the electrical checking of the wiring structure of the substrate, the contact part is in a molten state and the base part is in a solid state. However, the testing can also be carried out with the contact part and the base part in a solid state.
If during the transfer of the totally molten solder deposit, there is also a co-transfer of a bond-pad metallization placed on the bond pads of the electrically conductive coating of the solder-deposit
Ansorge Frank
Aschenbrenner Rolf
Dietrich Lothar
Kasulke Paul
Ostmann Andreas
Darby & Darby
Fraunhofer-Gesellschaft zur Forderung der ange-wandten Forschung
Rocchegiani Renzo
Smith Matthew
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