Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-03-24
2001-08-21
Saras, Steven (Department: 2625)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S098000
Reexamination Certificate
active
06278428
ABSTRACT:
BACKGROUND
The invention generally relates to an optical display device, and more particularly, the invention relates to a display panel, such as an active matrix liquid crystal display (LCD) panel, for example.
Referring to
FIG. 1
, an active matrix liquid crystal display (LCD) panel
1
may include an array
6
of pixel cells
25
(arranged in rows and columns) that form corresponding pixels of an image. To accomplish this, each pixel cell
25
typically receives an electrical voltage that controls optical properties of the pixel cell
25
and thus, controls the perceived intensity of the corresponding pixel. If the pixel cell
25
is a reflective pixel cell, the level of the voltage controls the amount of light that is reflected by the pixel cell
25
.
There are many applications that may use the display panel
1
. For example, a color projection display system may use three of the display panels
1
to modulate red, green and blue light beams to produce a projected multicolor composite image. As another example, a display screen for a laptop computer may include a display panel
1
along with red, green and blue color filters that are selectively mounted over the pixel cells to produce a multi-color image.
Regardless of the use of display panel
1
, updates are continually made to the voltages of the pixel cells
25
to refresh or update the displayed image. More particularly, each pixel cell
25
may be part of a different display element
20
(a display element
20
a,
for example), a circuit that stores a charge that indicates the voltage for the pixel cell. The charges that are stored by the display elements
20
typically are updated (via row
4
and column
3
decoders) in a procedure called a raster scan. The raster scan is sequential in nature, a designation that implies the display elements
20
are updated in a particular order such as from left-to-right or from right-to-left.
As an example, a particular raster scan may include a left-to-right and top-to-bottom “zig-zag” scan of the array
8
. More particularly, the display elements
20
may be updated one at a time, beginning with the display element
20
a
that is located closest to the upper left comer of the array
6
(assuming the display panel
1
is standing upright). During the raster scan, the display elements
20
are individually and sequentially selected (for charge storage) in a left-to-right direction across each row, and the updated charge is stored in each display element
20
when the display element
20
is selected. After each row is scanned, the raster scan advances to the leftmost display element
20
in the next row immediately below the previously scanned row.
During the raster scan, the selection of a particular display element
20
may include activating a particular row line
14
and a particular column line
16
, as the rows of the display elements
20
are associated with row lines
14
(row line
14
a,
as an example), and the columns of the display elements
20
are associated with column lines
16
(column line
16
a,
as an example). Thus, each selected row line
14
and column line
16
pair uniquely addresses, or selects, a display element
20
for purposes of transferring a charge (in the form of a voltage) from a video signal input line
12
to a capacitor
24
(that stores the charge) of the selected display element
20
.
As an example, for the display element
20
a
that is located at pixel position (
0
,
0
) (in Cartesian coordinates), a voltage may be applied to the video signal input line
12
(at the appropriate time) that indicates a new charge that is to be stored in the display element
20
a.
To transfer this voltage to the display element
20
a,
the row decoder
4
may assert (drive high, for example) a row select signal (called ROW
0
) on a row line
14
a
that is associated with the display element
20
a,
and the column decoder
3
may assert a column select signal (called COL
0
) on column line
16
a
that is also associated with the display element
20
a.
In this manner, the assertion of the ROW
0
signal may cause a transistor
22
(of the display element
20
a
) to couple a capacitor
24
(of the display element
20
a
) to the column line
16
a.
The assertion of the COL
0
signal may cause a transistor
18
to couple the video signal input line
12
to the column line
16
a.
As a result of these connections, the charge that is indicated by the voltage of the video signal input line
12
is transferred to the capacitor
24
of the display element
20
a.
The other display elements
20
may be selected for charge updates in a similar manner.
Referring also to
FIGS. 2
,
3
,
4
and
5
, a row of the display elements
20
may be scanned in the following manner. First, the row decoder
4
continuously asserts (drives high, for example) the ROW
X
signal (the ROW
0
, ROW
1
, . . . or ROW
N
signal, as examples) that is associated with the particular row. While the ROW
X
signal remains asserted, the display elements
20
of the selected row are sequentially selected in column order to receive a time slice of the voltage of the video signal input line
12
. In this manner, the column decoder
3
individually and sequentially asserts (drives high, for example) the COL column select signals (the COL
O
, COL
1
, . . . and COL
M
signals, as examples), as depicted in
FIGS. 4 and 5
for the COL
0
and COL
M
signals, while the row decoder
4
keeps the ROW
X
signal asserted. The selection of each display element
20
(and the associated charge transfer) may consume a cycle of a clock signal (called CLK and shown in FIG.
2
). Thus, a scan of M (i.e., the number of columns) display elements
20
of a row may consume approximately M clock cycles.
In the above-described approach, all of the display elements
20
are sequentially and individually selected according to a predefined raster scan sequence, a technique that may limit the rate at which a particular portion of the array
6
may be updated. For example, the display
1
may be used to display picture frames of a video image, and between two successive frames, some portions of the image may change more rapidly than other parts of the image. Unfortunately, the maximum rate at which the more rapidly changing portions may be updated may be limited by the rate at which the raster scan is performed. As a result, temporal artifacts, or errors, in the video image may be more apparent in the more rapidly changing portions of the image.
Thus, there is a continuing need for an arrangement that addresses one or more of the above-stated problems.
SUMMARY
In one embodiment of the invention, a method includes storing charges on different column lines that are associated with an array of pixel cells. After the storing, the charges are transferred from the column lines to storage elements that are associated with some of the pixel cells.
In another embodiment, a method for updating a portion of a display includes selecting columns of pixel cells that are associated with the portion and selecting rows of pixel cells that are associated with the portion. For each selected row of pixel cells, charges are stored on column lines that are associated with the selected columns of pixel cells, and after the storage, the charges are used to update the selected row.
In another embodiment, a display includes an array of pixel cells, storage elements, column lines, video input lines and switches. The pixel cells of the array are arranged in rows of pixel cells and columns of pixel cells. Each storage element is associated with one of the pixel cells. The column lines are associated with the columns of pixel cells, and each video input line is associated with one of the column lines and adapted to transfer charge to the associated column line. The switches are selectively controlled to transfer charges between the video input lines and the column lines.
In another embodiment, a display includes a first group of pixel cells and a second group of pixel cells. The first group of pixel cells is adapted to indicate a portion of a current frame
Miller Anthony C.
Smith Ronald D.
Intel Corporation
Kumar Srilakshmi
Saras Steven
Trop Pruner & Hu P.C.
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