Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters
Reexamination Certificate
1999-09-24
2001-08-14
Nguyen, Vinh P. (Department: 2858)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Lumped type parameters
Reexamination Certificate
active
06275061
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of testing a substrate, i.e., an array substrate of an active matrix type liquid crystal display panel device including switching elements each of which is formed of a thin film transistor using a polycrystalline silicon (polysilicon) film or the like as a semiconductor layer and pixel electrodes arranged to form a matrix or a method of testing flat panel display including a substrate, i.e., a liquid crystal display panel device including such an array substrate.
The array substrate included in an active matrix type liquid crystal display panel device is equipped with a plurality of scanning lines formed on an insulating substrate and a plurality of signal lines crossing these scanning lines. The array substrate is also equipped with a plurality of thin film transistors (TFT's) each using a polysilicon film as a semiconductor layer, which are formed at the cross points between the scanning lines and the signal lines, and with a plurality of pixel electrodes arranged in a plurality of pixel regions defined by these scanning lines and signal lines to form a matrix.
In the active matrix type liquid crystal display panel device, the electrical charge written in the liquid crystal capacitance between the pixel electrode and the counter electrode during the selected period of the scanning line is changed during the non-selected period by the parasitic capacitances, the off-leak current of the TFT element and the potential fluctuation of the adjacent signal lines so as to bring about a crosstalk generation or reduction of the contrast ratio. To suppress occurrence of such a problem, the liquid crystal display panel device of this type is constructed in general such that a storage capacitor is formed in parallel electrically with the liquid crystal capacitance formed between the pixel electrode and the counter electrode.
In the active matrix type liquid crystal display panel device using a polysilicon film, the storage capacitor is provided by a MOS structure. Specifically, the storage capacitor consists of a storage capacitor electrode formed of a polysilicon film doped with an impurity and a storage capacitor line consisting of a metal film arranged to face the storage capacitor electrode with an insulating film interposed therebetween.
Each of the semiconductor layer of the TFT consisting of the polysilicon film and the storage capacitor electrode, which are used in the particular liquid crystal display panel device, is formed by irradiating an amorphous silicon film formed on a glass substrate with an energy beam such as an excimer laser for annealing the amorphous silicon film.
In the process of forming the polysilicon film, amorphous silicon that is temporarily melted is recrystallized and solidified to form polysilicon. In this case, projections are formed on the surface of the resultant polysilicon film by, for example, a difference in volume between the amorphous silicon layer and the polysilicon film.
The thickness of a gate insulating film formed on the polysilicon film is substantially decreased above these projections. Therefore, if a potential difference is generated between the polysilicon film and a metal film formed on the gate insulating film, the withstand voltage characteristics of the transistor are deteriorated. As a result, local defects such as short-circuit and current leakage tend to take place in future between the polysilicon film (semiconductor layer of TFT) and the gate electrode and between the polysilicon film (storage capacitor electrode) and the storage capacitor line.
If such a defect is generated, the potential of the pixel electrode is held stationary, with the result that the pixel is kept lit. Further, since a DC voltage is kept applied between the counter electrode and the pixel electrode, the liquid crystal composition contained in the liquid crystal layer corresponding to the defective pixel region is deteriorated, leading to a serious problem in reliability.
BRIEF SUMMARY OF THE INVENTION
The present invention, which has been achieved in view of the problems described above, is intended to provide a test method of a substrate, in which short-circuit is positively brought about between the electrodes in respect of a pixel which may possibly become defective in future so as to limit the defects to local defects and, thus, to prevent the apparatus from being rejected from the market.
Another object of the present invention is to provide a test method of a substrate, in which a defective short-circuit between the electrodes forming a storage capacitor is improved in respect of a substrate having local defects the number of which is smaller than a predetermined number so as to improve the product yield and a reliability.
According to an aspect of the present invention, there is provided a test method of a substrate comprising pixel electrodes arranged to form a matrix, a plurality of scanning lines arranged along the rows of the pixel electrodes, a plurality of storage capacitor lines arranged along the scanning lines and applied a first voltage thereto, a plurality of signal lines arranged along the columns of the pixel electrodes and applied a fourth voltage which is in the range from a second voltage to a third voltage higher than the second voltage, a plurality of switching elements arranged in the vicinity of crossing points between the scanning lines and the signal lines and selectively applying the fourth voltage from the signal lines to the pixel electrodes, the method comprising the steps of: setting the switching elements associated with plural of the scanning lines ON state; applying voltages to the signal lines and the storage capacitor lines so that each potential difference between the storage capacitor lines and storage capacitor electrodes is substantially equal to or higher than a maximum potential difference between the first voltage and the fourth voltage; and maintaining the each potential difference between the storage capacitor lines and storage capacitor electrodes for a predetermined period.
In the method of the present invention, voltage that makes a potential difference between the storage capacitor line and the storage capacitor electrode higher than that in the step of forming the storage capacitor is kept applied to the storage capacitor line and the storage capacitor electrode for a predetermined period of time to make the pixel, in which a short-circuit defect is expected to take place between the electrodes forming a storage capacitor in future, locally defective. Then, the number of defects is counted, followed by supplying only those substrates which have defects the number of which is smaller than a predetermined number to the succeeding step.
It should also be noted that the substrates having defects the number of which is smaller than the predetermined number are electrically detached from the pixel electrodes of the pixel regions corresponding to the storage capacitor electrodes so as to improve the pixel in which a short-circuit defect has taken place to a semi-lit state.
It follows that the present invention provides a test method of a substrate which permits improving the product yield and the reliability.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
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patent: 5506516 (1996-04-01), Yamashita et al.
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patent: 5608558 (1997-03-01), Katsumi
patent: 3-80225 (1991-04-01), None
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patent: 9-159997 (1997-06-01), None
Kabushiki Kaisha Toshiba
Nguyen Vinh P.
Pillsbury & Winthrop LLP
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