D/A converter having mechanism for preventing analog signal...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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Details

C341S144000

Reexamination Certificate

active

06252530

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a D/A converter for converting a digital signal to an analog signal, and more specifically to a 1-bit system of D/A converter for further converting a digital signal having been converted to a 1-bit pulse to an analog signal.
BACKGROUND OF THE INVENTION
Conventionally, there has been proposed a D/A converter based on the 1-bit system as a device for converting a digital signal to an analog signal with high precision. This is achieved by improving the zero-cross distortion and linear degradation in signal conversion which occur in the conventional type of D/A converter based on the multi-bit system as described, for example, in the book All about Digital Audio (Sengaku Inoue, Denpa Shinbunsha).
Next, structure and a basic operation of the 1-bit system D/A converter based on the conventional technology is described with reference to FIG.
8
. In
FIG. 8
, designated at the reference numeral
1
is a digital signal input terminal.
2
a
and
2
b
are adders,
3
a
,
3
b
and
3
c
are delaying units,
4
is a quantizing unit,
5
is a weighting section,
6
is a low-pass filter,
7
is an analog signal output terminal and
8
is a noise shaping circuit. Various configurations for this noise shaping circuit section
8
are know, however, a noise shaping circuit section
8
having three delaying units
3
a
,
3
b
,
3
c
and two adders
2
a
,
2
b
is considered.
In
FIG. 8
, at first, a digital signal having a plurality of bits is inputted into the digital signal input terminal
1
. Then, this digital signal is converted to a pulse of ±1 in the quantizing unit
4
after passing through the adders
2
a
and
2
b
. This pulse is sent, after being converted to an analog signal by the low-pass filter
6
, to the analog signal output terminal
7
, and is, at the same time, sent to the weighting section
5
, multiplied by a weight factor in the weighting section
5
, sent to the delaying unit
3
c
, and is delayed by the delaying unit
3
c
, then the delayed digital signal is returned to the adders
2
a
,
2
b
respectively, and is added to the next digital signal in each of the adders
2
a
,
2
b
. The digital signal passing through the adder
2
a
is branched at a branch point X to be sent to the delaying unit
3
a
, delayed therein, returned to the adder
2
a
, and is added to the next digital signal in the adder
2
a
. Also, the digital signal passing through the adder
2
b
is branched at a branch point Y to be sent to the delaying unit
3
b
, delayed therein, returned to the adder
2
b
, and is added to the next digital signal in the adder
2
b.
The 1-bit system D/A converter having the configuration as described above is a high-precision D/A converter with a comparatively simpler structure as compared to that of the multi-bit system of D/A converter based on the conventional technology. This is realized because of an effect of dispersing distribution of noise in the noise shaping circuit
8
.
Although the noise shaping circuit
8
as described above plays an extremely important roll in the 1-bit D/A converter, there are some problems therein.
When a value held in each of the delaying units
3
a
,
3
b
becomes large immediately after the power is turned ON or due to noise entering therein, an overflow may occur in the noise shaping circuit because of a loop structure formed between the adders and delaying units. Further, the occurrence of this overflow may cause distortion in a waveform of an analog signal to be outputted.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide, for solving the problems described above, a D/A converter in which a waveform of an analog signal is not distorted even when an overflow occurs in a noise shaping circuit for the 1-bit system D/A converter.
In the D/A converter of the present invention, an overflow detector is provided which passes the signal as it is when an overflow is not detected, and sends a reset signal to the delaying units when an overflow is detected and also clears the data in the delaying units.
Other objects and features of this invention will become clear from the following description with reference to the accompanying drawings.


REFERENCES:
patent: 4223389 (1980-09-01), Amada et al.
patent: 4270027 (1981-05-01), Agrawal
patent: 5325399 (1994-06-01), Haspeslagh et al.
patent: 5550544 (1996-08-01), Sakiyama et al.
patent: 5629881 (1997-05-01), Leeb et al.
patent: 5815102 (1998-09-01), Melanson
“All About Digital Audio”, by Chitake Inoue; K.K. Electric Wave News Paper Office, Aug. 25, 1994.
“Oversampling A-D Converting Technology”, by Akira Yukawa; Nikkei Business Publications Ltd., Dec. 25, 1990.

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