Packet switched multiport memory NXM switch node and processing

Multiplex communications – Wide area network – Packet switching

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370 94, H04Q 1104, H04J 324

Patent

active

046302581

ABSTRACT:
A packet switching node which processes applied data packets containing routing tag signals indicative of the output port destination to which the data packets are to be applied. The invention comprises an N.times.M switch node that accepts data packets at any of N input ports and routes each to any of M output ports. The output selected is determined by the routing tag signal in the packet. The node comprises a multiport memory having a predetermined number of memory locations available for storage of data packets applied to each of a plurality of input ports. Control logic coupled to the input and output ports and memory is designed so that the data packets are effectively sorted according to their desired output port destination. The control logic comprises arbitration logic which randomly, in a statistical sense, chooses among any data packets that are directed to the same output port. The algorithm implemented by the arbitration logic is designed so that data packets will not wait indefinitely to be routed from the switch node. A method in accordance with the present invention comprises sorting and storing the data packets based upon the output port destination and then arbitrating among the data packets. The final step involves routing the data packets selected during the arbitration processes to the output ports identified in the routing tag signals.

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