Read write system for multiple line adapter organization

Details Read write system for multiple line adapter organization Read write system for multiple line adapter organization

1984-03-30

1986-12-16

Chan, Eddie P.

Boots, shoes, and leggings

G06F 1300

Patent

active

046302328

ABSTRACT:
An I/O subsystem, controlled by a microprocessor, includes a plurality of line adapters, each of which provides data-comm lines to remote terminal units. Each line adapter has a USART control unit and a timer unit having internal registers which can be written-into or read-out from by said microprocessor which uses means to select a particular line adapter to access a particular register in the USART unit or the timer unit.

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patent: 4281315 (1981-07-01), Bauer et al.
patent: 4293909 (1981-10-01), Catiller et al.
patent: 4325119 (1982-04-01), Grandmaison et al.
patent: 4365293 (1982-12-01), Holtz
"Architecture of a Universal Communications Processor", Steele & Mattson, Computer Design, 1973, pp. 63-68.

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