Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
1998-04-01
2001-03-13
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S692000, C257S676000
Reexamination Certificate
active
06201292
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a resin-sealed semiconductor device with a semiconductor element mounted thereon, a circuit member for use in the same and a method of manufacturing a resin-sealed semiconductor device.
2. Background Art
Recently, for semiconductor devices, a progress in technique for high integration and miniaturization and a tendency (trend) toward higher performance and reduction in thickness and size of electronic equipment have resulted in an ever-increasing demand for higher integration and function such as typified by ASIC (application-specific IC) of LSI.
Accordingly, a trend of development also in a resin-sealed semiconductor device using a lead frame has progressed from a surface mounting package such as SOJ (small outline J-bend package) and QFP (quad flat package) via a package reduced mainly in thickness such as TSOP (thin small outline package) further to a structure like LOC (lead on chip) for enhancing a chip storage efficiency by means of a three-dimensional package inner structure.
However, a resin-sealed semiconductor device package having increased integration density and function is further demanded to be provided with multiple pins and have a thin and small structure. In the aforementioned conventional package, since lead wires are drawn around in an outer peripheral portion of the semiconductor element, the miniaturization of the package appears to be restricted.
Also, in the TSOP or another small-sized package, the provision of multiple pins appears to be restricted in respect of a drawn-around lead and a pin pitch.
SUMMARY OF THE INVENTION
Wherefore, an object of the invention is to provide a resin-sealed semiconductor device which can realize a high storage efficiency of semiconductor element chips and miniaturization and enhance a mounting density onto a circuit substrate, a resin-sealed semiconductor device which can cope with a demand for multiple pins, a circuit member for use in the semiconductor device and a method of manufacturing a semiconductor device.
To attain this and other objects, the invention provides a resin-sealed semiconductor device in which plural terminal portions each having an inner terminal on a surface and an outer terminal on a rear face with the inner and outer terminals being integrally formed are arranged two-dimensionally substantially in a plane electrically independent of one another. The inner terminals of the terminal portions are electrically connected via wires to terminals of a semiconductor element. The entirety is sealed with a resin in such a manner that the outer terminals of the terminal portions are partially exposed to the outside. A die pad is electrically independently disposed in a substantially middle portion in the plane in which the terminal portions are arranged two-dimensionally. The semiconductor element is mounted on the die pad.
Also, the invention provides a resin-sealed semiconductor device in which plural terminal portions each having an inner terminal on a surface and an outer terminal on a rear face with the inner and outer terminals being integrally formed are arranged two-dimensionally substantially in a plane electrically independent of one another. The inner terminals of the terminal portions are electrically connected via wires to terminals of a semiconductor element. The entirety is sealed with a resin in such a manner that the outer terminals of the terminal portions are partially exposed to the outside. Leads are integrally interconnected to the terminal portions along the plane in which the plural terminal portions are arranged two-dimensionally. The leads are arranged electrically independent of one another. The semiconductor element is electrically insulated and mounted on the plural leads.
The invention provides a circuit member which is provided with an outer frame member, plural terminal portions independently connected via connection leads to the outer frame member and a die pad connected via connection leads to the outer frame member. Each terminal portion has an inner terminal on a surface and an outer terminal on a rear face with the inner and outer terminals being integrally formed. An inner terminal face of each terminal portion is positioned substantially on a plane.
Also, the invention provides a circuit member which is provided with an outer frame member and plural terminal portions independently connected via connection leads to the outer frame member. Each terminal portion has an inner terminal on a surface and an outer terminal on a rear face with the inner and outer terminals being integrally formed. An inner terminal face of each terminal portion is positioned substantially on a plane. Along the plane, leads for mounting a semiconductor element are integrally interconnected to the terminal portions.
The invention provides a method of manufacturing a resin-sealed semiconductor device. In the method, plural terminal portions each having an inner terminal on a surface and an outer terminal on a rear face with the inner and outer terminals being integrally formed are arranged two-dimensionally substantially on a plane electrically independent of one another. The inner terminals of the terminal portions are electrically connected via wires to terminals of a semiconductor element. The entirety is sealed with a resin in such a manner that the outer terminals of the terminal portions are partially exposed to the outside. The manufacture method is provided with following processes:
(A) a circuit member preparing process for etching a conductive substrate to form a circuit member which is provided with plural terminal portions each having an inner terminal on a surface and an outer terminal on a rear face with the inner and outer terminals being integrally formed, a die pad and an outer frame member to which the terminal portions are integrally interconnected via connection leads independent of one another and to which the die pad is integrally interconnected via connection leads;
(B) a semiconductor element mounting process for fixing and mounting the semiconductor element to the die pad;
(C) a wire bonding process for electrically connecting terminals of the semiconductor element and the inner terminals of the circuit member via wires;
(D) a resin sealing process for sealing the entirety with a resin in such a manner that the outer terminals are partially exposed to the outside; and
(E) an outer frame member removing process for cutting the connection leads of the circuit member to remove the outer frame member.
Also, the invention provides a method of manufacturing a resin-sealed semiconductor device. In the method, plural terminal portions each having an inner terminal on a surface and an outer terminal on a rear face with the inner and outer terminals being integrally formed are arranged two-dimensionally substantially in a plane electrically independent of one another. The inner terminals of the terminal portions are electrically connected via wires to terminals of a semiconductor element. The entirety is sealed with a resin in such a manner that the outer terminals of the terminal portions are partially exposed to the outside. The manufacture method is provided with following processes:
(A) a circuit member preparing process for etching a conductive substrate to form a circuit member which is provided with plural terminal portions each having an inner terminal on a surface and an outer terminal on a rear face with the inner and outer terminals being integrally formed, an outer frame member to which the terminal portions are integrally interconnected via connection leads independent of one another and leads integrally interconnected to the terminal portions for mounting a semiconductor element thereon;
(B) a semiconductor element mounting process for insulating, fixing and mounting the semiconductor element on the semiconductor element mounting leads;
(C) a wire bonding process for electrically connecting terminals of the semiconductor element and the inner terminals of the circuit member via wires;
(D) a
Hitomi Yoichi
Nakamura Makoto
Sasaki Masato
Yagi Hiroshi
Dai Nippon Insatsu Kabushiki Kaisha
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Potter Roy
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