Task control method with reduced stacked memory requirement

Data processing: vehicles – navigation – and relative location – Vehicle control – guidance – operation – or indication – With indicator or control of power plant

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C709S241000, C710S264000

Reexamination Certificate

active

06240358

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
The present invention is related to, and claims priority from, Japanese Patent Application No. Hei. 10-217608, the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a task control methodology, more particularly, to a vehicle component task control method realized via a multi-task or real time operating system.
2. Related Art
As is well known, conventional vehicle engine control is performed by a single task construction realized by using a single task operating system, and real time control is realized via interrupt processing.
In accordance with the increasing complexity of engine control in recent years, however, it has become necessary to process a number of tasks (e.g., processes or jobs) and to define priorities for these numerous tasks. It has, therefore, been proposed to introduce a multi-task construction realized by using a multi-task real time operating system.
FIG. 9
is an explanatory diagram illustrating a processing routine in which three tasks A-C and an interrupt are to be processed through multi-task construction realized either by a multi-task or real time operating system.
Here in the individual tasks A-C, task B is set to have the highest priority whereas task C is set to have the lowest priority. The interrupt processing is set to have a higher priority than those of the individual tasks A-C. It is also set that the task changing routine is called to start task B after the end of the interrupt processing and to start task C after the end of task B.
This is exemplified by the time synchronized task (e.g., throttle valve control) for task A to be executed in synchronism with time, the rotation synchronized task (e.g., control of fuel injection rate or an ignition timing) for task B to be executed in synchronism with the rotation of the crank, and the rotation synchronized task (e.g., control of idle speed control valve) for task C to be executed in synchronism with the rotation of the crank.
When interrupt processing occurs at a time t
1
in the processing of task A, the processing of task A is interrupted so that the interrupt processing of the highest priority is executed. When the interrupt processing is ended at time t
2
, moreover, a task changing routine is called to start task B so that task B is processed from time t
3
. After this, when the processing of task B is ended at time t
4
, the task changing routine is called to start task C. Since task A has a higher priority than that of task C, however, the remaining processing of task A is performed at time t
5
subsequent to task B. When the processing of task A is ended at time t
6
, moreover, the processing of task C is performed.
The individual tasks A-C and the interrupt are processed in a stack region which is set in the RAM of the microcomputer located in the electronic control unit.
FIG. 10
illustrates the construction of the stack region of the case in which the individual tasks A-C and the interrupt, as shown in
FIG. 9
, are processed. The RAM includes both a stack region and a stack pointer managing region are located. The stack region is a working region for processing the individual tasks A-C, and the interrupt and is provided for each of the individual tasks.
The stack pointer managing region is for latching and managing a stack pointer indicating the address of a region used for processing the individual tasks A-C in the stack region, and is provided for each of these individual tasks. Here, the occupation percentage of the stack pointer managing region in the RAM is so small that the RAM can be said to be substantially occupied by the stack region.
In an initial state, the value of the stack pointer of task A, as latched in the stack pointer managing region, is set to “SPA0”; the value of the stack pointer of task B, as latched in the stack pointer managing region, is set to “SPB
0
”; and the value of the stack pointer of task C, as latched in the stack pointer managing region, is set to “SPC
0
”.
As a result, the processing of task A is started from the SPA
0
of the stack region. Moreover, it is assumed that the value of the stack pointer advances to the “SPA
1
” at the instant (i.e., at the time tl in
FIG. 9
) when the interrupt processing begins during the processing of the task A. Then, the interrupt processing is started from SPA1 of the stack region.
Moreover, it is assumed that the value of the stack pointer advances to “SPA
2
” at the instant (i.e., at the time t
2
in
FIG. 9
) when the interrupt processing is ended. When the interrupt processing is ended, the stack pointer returns to SPA
1
or the value at the instant when the processing of task A is interrupted, and the task changing routine is called to start task B. At this time, the value of the stack pointer of task A, as latched in the stack pointer managing region, is changed from the initial value SPA
0
to the value SPA
1
of the stack pointer at the instant the processing of the task A is interrupted. Then, the processing of task B is started (at the time t
3
in
FIG. 9
) from the SPB
0
of the stack region.
When the processing of task B is ended, the task changing routine is called so that task C is started (at time t
4
in FIG.
9
). Since task A has a higher priority than that of the task C, however, the remaining processing of interrupted task A is performed (at time t
5
in FIG.
9
). At this time, the stack pointer is shifted to SPA
1
of task A, as latched in the stack pointer managing region, so that the remaining processing of task A is performed from the SPA
1
of the stack region.
After this, when the processing of task A is ended, the stack pointer shifts to the SPC
0
so that the processing of task C is started from the SPC
0
of the stack region (at time t
6
in FIG.
9
).
Thus, when the interrupt processing comes in during the processing of task A, the working regions (SPA
1
to SPA
2
) for the interrupt processing are stacked over the working regions (SPA
0
to SPA
1
) of task A in the stack region, as has been used at that time for processing the task A.
This also applies to the case in which the interrupt processing comes in during the processing of task B or task C. In short, interrupt processing can occur during the processing of any of the individual tasks A-C. When the interrupt processing occurs during the processing of task B, therefore, the working region of the interrupt processing is stacked over the working region of task B in the stack region, as has been used at that time for processing task B. When the interrupt processing comes in during the processing of task C, on the other hand, the working region of the interrupt processing is stacked over the working region of task C in the stack region, as has been used at that time for processing task C.
Therefore, the sizes of the stack regions of the individual tasks A-C have to be set to the total of the sizes necessary for processing the tasks and the size necessary for the interrupt processing. As has been described, moreover, the size of the stack pointer managing region is so small that the size of the RAM is determined by the total of the sizes of the stack regions of the individual tasks A-C. In other words, the size of the RAM has to set to the total of the sizes necessary for processing the individual tasks A-C and the size necessary for the interrupt processing to be stacked over each of the stack regions of the individual tasks A-C.
For the case in which the size necessary for processing task A is 400 bytes, the size necessary for processing task B is 300 bytes, the size necessary for processing task C is 500 bytes, and the size necessary for interrupt processing is 100 bytes, the size of the stack region of task A is set to 500 (400+100) bytes, the size of the stack region of task B is set to 400 (300+100) bytes, and the size of the stack region of task C is set to 600 (500+100) bytes. This makes it necessary to set the size of the RAM to the total value of 1,500 (=500+400&plu

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Task control method with reduced stacked memory requirement does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Task control method with reduced stacked memory requirement, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Task control method with reduced stacked memory requirement will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2491283

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.