Boots – shoes – and leggings
Patent
1988-05-09
1991-02-12
Fleming, Michael R.
Boots, shoes, and leggings
36424341, 36424345, G06F 1314
Patent
active
049929305
ABSTRACT:
A multiprocessor data processing system includes a processing unit which, together with other processing units, including input/output units, connects in common to an asynchronous bus network for sharing a main memory. At least one processing unit includes a synchronous private write through cache memory system which includes a main directory and data store in addition to a bus watcher and a duplicate directory. The bus watcher connects to the asynchronous bus network and captures all main memory requests while the duplicate directory maintains a copy of the cache unit's main directory. Independently and autonomously synchronously operated tie-breaker circuits apply requests to the main and duplicate directories. When tie-breaker circuits detect conditions relating to a request which could result in cache incoherency, it initiates uninterrupted sequences of cycles within the corresponding cache main or duplicate directory to complete the processing of that same request.
REFERENCES:
patent: 4392200 (1983-07-01), Arulpragasam et al.
patent: 4471429 (1984-09-01), Porter et al.
patent: 4731739 (1988-03-01), Woffinden et al.
patent: 4807110 (1989-02-01), Pomerene et al.
Barlow George J.
Gilfeather Amy E.
Bull HN Information Systems Inc.
Chun Debra A.
Driscoll Faith F.
Fleming Michael R.
Solakian John S.
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