Method of forming extended lead package

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Utility Patent

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Details

C438S123000, C257S676000

Utility Patent

active

06168975

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
This invention relates to electrical connection and mechanical attachment of an integrated circuit element and the leads of a lead frame and more particularly to a lead frame having extended leads.
(2) Description of the Related Art
Conventional lead frames are attached to the input/output pads of integrated circuit chips. These interconnections provide electrical connection but do not provide a significant thermal conduction path for removing heat energy from the chip.
U.S. Pat. No. 5,583,378 to Marrs et al. describes an integrated circuit package having a ball grid array and includes a thermal conductor.
U.S. Pat. No, 5,598,034 to Wakefield describes a plastic package for integrated circuit chips which includes thermally conductive heat transfer bodies to extend from the circuit chip to or near the surface of the package.
U.S. Pat. No. 5,700,697 to Dlugokecki describes a reconstructed package for an integrated circuit chip.
U.S. Pat. No. 5,638,596 to McCormick describes an electronic circuit package having a number of conductive layers and employing a lead frame.
SUMMARY OF THE INVENTION
Lead frames are frequently used to make electrical connection to integrated circuit chips because they are low cost and a number of techniques to join the lead frame to the integrated circuit chip input/output pads are available. A typical lead frame
10
is shown in
FIG. 1
which shows the conductive leads
12
in a form factor which will provide for easy interconnection to the integrated circuit chip.
FIG. 2
shows a plan view of the integrated circuit chip
14
joined to the conductive leads
12
of the lead frame
10
.
FIG. 3
shows a cross section view of the chip
14
joined to the lead
12
of the lead frame. The input/output pads
18
of the chip
14
are joined to the conductive leads
12
of the lead frame by a metal pad
16
such as a solder pad, or the like. The assembly is then encapsulated.
One of the problems with this method of making interconnection to the chip is the problem of removal of heat generated by the electrical operation of the chip. Often a thermal conduction path must be provided by attaching a heat spreader or slug to the back of the chip, not shown, to remove heat energy from the chip resulting in added cost and processing complexity.
It is a principle objective of this invention to provide a method of attaching an integrated circuit chip to a lead frame which will provide added thermal conduction to remove heat energy from the chip.
It is another principle objective of this invention to provide a package comprising an integrated circuit chip attached to a lead frame which will provide added thermal conduction to remove heat energy from the chip.
These objectives are achieved by using an extended lead package. In the extended lead package all or any number of the leads of the lead frame have added length and the leads extend under the back side of chip. The chip is supported by the leads with added length. The back side of the chip is bonded to the extended leads using a bonding material which provides thermal conductivity but is an electrical insulator. Wire bonds are then used to make electrical connection between the input/output pads of the chip and the leads of the lead frame. The extended leads bonded to the back side of the chip provide a thermal conduction path to remove heat energy from the chip. The assembly can then be encapsulated using standard encapsulation techniques.


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patent: 5598034 (1997-01-01), Wakefield
patent: 5638596 (1997-06-01), McCormick
patent: 5700697 (1997-12-01), Dlugokecki
patent: 5770888 (1998-06-01), Song et al.
patent: 5824568 (1998-10-01), Zechman
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patent: 5929514 (1999-07-01), Yalamanchili

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