Test carrier with force applying mechanism guide and...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Reexamination Certificate

active

06285202

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to semiconductor manufacture and specifically to an improved test carrier, test system, and test method for testing semiconductor components, such as bare dice and chip scale packages.
BACKGROUND OF THE INVENTION
Semiconductor dice are being fabricated with increasing numbers of integrated circuits. As circuit integration increases, the sizes of semiconductor components are becoming smaller. Bare dice and chip scale packages can be only millimeters in length, and fractions of a millimeter in thickness. In addition, the external contacts on the components are becoming smaller and more closely spaced. For example, for fine ball grid array (FGBA) components, external contact balls can have a diameter as small as about 0.127 mm (0.005 inch), and a center to center pitch as small as about 0.228 mm (0.008 inch).
Typically, these types of components are tested using test carriers that mount to a test board. Exemplary test carriers are described in U.S. Pat. No. 5,844,418 to Wood et al.; U.S. Pat. No. 5,815,000 to Farnworth et al.; and U.S. Pat. No. 5,783,461 to Hembree.
As the components and external contacts on the components become smaller, making temporary electrical connections with the components for testing becomes more difficult. The test carrier includes an interconnect having contacts that make the temporary electrical connections with the external contacts on the components. In addition, the test carrier include a force applying mechanism that applies a biasing force for biasing the component against the interconnect. An exemplary force applying mechanism includes a biasing member, such as a metal or elastomeric spring for applying the biasing force, and a clamp or latch plate for securing the biasing member to a base of the carrier.
During assembly of the component into the carrier, the external contacts on the component are aligned with the contacts on the interconnect, and then placed in electrical contact therewith. One method of alignment is with an optical alignment system, as described in U.S. Pat. No. 5,634,267 to Wood et al. Another method of alignment is with a mechanical alignment system, as described in U.S. Pat. No. 5,559,444 to Farnworth et al.
Also during assembly of the carrier, the force applying member is attached to the base. One problem that occurs with the assembly of this type of carrier, is that although the component and the interconnect may be initially aligned, the force applying mechanism and carrier base may be misaligned. This misalignment can cause the contacts on the component and the interconnect to become misaligned, or can cause a shear load to be placed between the component and the interconnect. With small closely spaced contacts, any misalignment or loading can adversely affect, or prevent, the temporary electrical connections between the component contacts and the interconnect contacts.
One method for avoiding misalignment and loading by the force applying mechanism is disclosed in U.S. Pat. No. 5,739,050 to Farnworth. This method employs an assembly tool having a slide mechanism that allows the force applying mechanism to freely slide and self center relative to the base of the carrier. However, this method requires an assembly tool which may not be compatible with some assembly systems, or with some manual assembly techniques.
In addition to being misaligned during assembly, the force applying member can also move following assembly, causing misalignment or loading of the contacts. For example, the assembled test carriers must be transported and also loaded onto test boards, and can be bumped during these procedures. It would be desirable to provide a test carrier with a force applying member that can be aligned with the base during assembly of the carrier, and protected from movement following assembly of the carrier.
In addition to the force applying mechanism, the test carrier can also include terminal contacts on the carrier base, which are adapted for electrical connection to the test board. The terminal contacts typically comprise pins or contact balls. During assembly and handling of the carriers, the terminal contacts are unprotected, and subject to bending and deformation by other equipment. Bending and deformation is a particular problem during placement of the terminal contacts into engagement with mating contacts on the test board. It would be desirable to provide a test carrier with a protector for protecting the terminal contacts, and for aiding in the alignment of the terminal contacts to mating contacts on a test board.
SUMMARY OF THE INVENTION
In accordance with the present invention, a test carrier, a test system, and a test method for semiconductor components are provided. The test carrier can be used to temporarily package semiconductor components, such as bare dice and chip scale packages, for test and burn-in.
The carrier comprises: a base for retaining the component, an interconnect for making temporary electrical connections with the component, an alignment member for aligning the component to the interconnect, and a force applying mechanism for biasing the component against the interconnect. The carrier also includes a guide mechanism for aligning and attaching the force applying mechanism to the base during assembly of the carrier, and for protecting the force applying mechanism in the assembled carrier. In addition, the carrier includes a protector for protecting terminal contacts on the base, and for aligning the terminal contacts with mating contacts on a test board.
The force applying mechanism includes a clamp, a biasing member and a pressure plate, which are configured for use with an assembly tool. The assembly tool can be used to attach the force applying mechanism to the guide mechanism and base during assembly of the carrier. In illustrative embodiments the biasing member comprises an elastomeric spring, or alternately a metal leaf spring.
The guide mechanism includes guide channels that engage opposed sides of the clamp, tab slots that engage tabs on the clamp, and release slots that enable release of the tabs from the tab slots. The guide mechanism facilitates both manual and automated assembly of the carrier. In addition to aligning the force applying mechanism relative to the interconnect during assembly of the carrier, the guide mechanism protects and maintains alignment of the force applying mechanism, such that shear loads between the interconnect and component are substantially eliminated. The guide mechanism can be formed separately and attached to the base, or can be molded integrally with the base.
The protector can also be formed separately and attached to the base, or molded integrally with the base. In addition, the protector can include protective members formed along opposed edges of the base, or alternately can completely enclose a periphery of the base. In addition to protecting the terminal contacts on the base, the protector can provide alignment surfaces for engaging mating surfaces on the test board, to align the terminal contacts during mounting of the carrier to the test board.
The test method comprises the steps of: providing a test carrier comprising a base, an interconnect, a force applying mechanism and a guide mechanism; assembling the carrier with a semiconductor component therein; mounting the carrier to a test board; and then applying test signals through the carrier to the component. The assembly step comprises: holding the force applying mechanism and component using an assembly tool; aligning the component to the interconnect; aligning the force applying mechanism to the base using the guide mechanism; and then placing the component in contact with the interconnect while securing the force applying mechanism to the guide mechanism.
The test system comprises the test carrier, a test board for the test carrier, and test circuitry in electrical communication with the test board. The test circuitry is configured to apply test signals through the test board, and through the test carrier to the component.


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