Current compensating bias generator and method therefor

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S540000, C327S538000

Reexamination Certificate

active

06175267

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to a bias generator and, more specifically, to a bias generator and method therefor which is designed to provide a current that follows voltage such that at lower voltage levels, the current is increased.
2. Description of the Prior Art
Presently, bias generation circuits have problems operating at low voltage levels (i.e., ~2 volts). They are either totally inoperable at low voltage levels, or they provide a bias current that requires significantly longer periods of time to perform sample/hold operations as related to A/D (Analog-to-Digital) applications. Present bias generation circuits also require numerous components and consume valuable silicon real estate when used in 10 bit and 12 bit A/D operations.
Therefore, a need existed to provide an improved bias generator circuit and method therefor. The improved bias generation circuit and method must be able to operate at low voltage levels (~2 volts) as related to A/D applications without requiring significantly longer periods of conversion time. The improved bias generation circuit and method must provide for a bias current that follows voltage such that at lower voltage levels, the bias current is increased. The improved bias generation circuit and method must further be implemented using fewer components than current bias generation circuits thereby saving valuable silicon real estate.
SUMMARY OF THE INVENTION
In accordance with one embodiment of the present invention, it is an object of this invention to provide an improved bias generator circuit and method therefor.
It is another object of the present invention to provide an improved bias generation circuit and method that is able to operate at low voltage levels, as related to A/D (Analog-to-Digital) applications without requiring significantly longer periods of conversion time.
It is still another object of the present invention to provide an improved bias generation circuit and method that generates a bias current that follows voltage such that at lower voltage levels the bias current is increased.
It is still another object of the present invention to provide an improved bias generation circuit and method that increases the bias current at lower voltage levels.
It is still another object of the present invention to provide an improved bias generation circuit and method that may be implemented using fewer components than current bias generation circuits thereby saving valuable silicon real estate.
BRIEF DESCRIPTION OF THE PREFERRED EMBODIMENTS
In accordance with one embodiment of the present invention, a current compensating bias generator is disclosed. The current compensating bias generator has a bias generator circuit for generating a current. A current compensating circuit is coupled to the bias generator circuit for changing a value of the current as a voltage input to the current compensating bias generator is changed. A resistive ladder circuit is coupled to the current compensating circuit for setting a voltage level trip point for the current compensating circuit at which the current compensating circuit is used to change the value of the current.
In accordance with another embodiment of the present invention, a method of providing a current compensating bias generator is disclosed. The method comprises the steps of:
providing a bias generator circuit for generating a current;
providing a current compensating circuit coupled to the bias generator circuit for changing a value of the current as a voltage input to the current compensating bias generator is changed; and
providing a resistive ladder circuit coupled to the current compensating circuit for setting a voltage level trip point at which the current compensating circuit is to change the value of the current.
The foregoing and other objects, features, and advantages of the invention will be apparent from the following, more particular, description of the preferred embodiments of the invention, as illustrated in the accompanying drawing.


REFERENCES:
patent: 4302718 (1981-11-01), Schade, Jr.
patent: 4461992 (1984-07-01), Yamaguchi et al.
patent: 4780624 (1988-10-01), Nicollini et al.
patent: 5384740 (1995-01-01), Etoh et al.
patent: 5530339 (1996-06-01), Macrae et al.
patent: 5903141 (1999-05-01), Tailliet

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